Commit Graph

209 Commits

Author SHA1 Message Date
Christian Gmeiner f485e5671c gallium: add scalar isa shader cap
v1 -> v2:
 - nv30 is _NOT_ scalar as suggested by Ilia Mirkin.
 - Change from a screen cap to a shader cap as suggested
   by Eric Anholt.
 - radeonsi is scalar as suggested by Marek Olšák.
 - Change missing ones to be scalar.

v2 -> v3:
 - r600 prefers vec4 as suggested by Marek Olšák.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-06-20 17:55:39 +02:00
Rhys Perry 51a221e378 gallium: add support for programmable sample locations
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com> (v2)
Reviewed-by: Marek Olšák <marek.olsak@amd.com> (v2)
2018-06-14 20:09:45 -06:00
Marek Olšák 34ea55d820 gallium: add PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-05-29 20:13:24 -04:00
Rhys Perry fffe5e2d14 gallium: add initial support for conservative rasterization
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-04-30 21:13:53 -06:00
Timothy Arceri 9c51a7ea29 gallium: add packed uniform CAP
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-03-20 14:17:34 +11:00
Marek Olšák 8e7222f4e5 gallium: allow drivers to impose BO flags restrictions on constant buffer 0
Required by radeonsi for optimal behavior.
2018-02-17 04:20:55 +01:00
Dave Airlie 9ddacd9af4 gallium: drop all the guard band float caps.
Nobody queries these and nobody sets them to anything useful,
the docs say TODO.

Drop them until a use appears.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2018-02-14 08:50:08 +10:00
Timothy Arceri 4d982ae2c7 gallium/st/clover: remove unused PIPE_SHADER_IR_LLVM
This has been unused since 100796c15c.

Acked-by: Marek Olšák <marek.olsak@amd.com>
2018-02-01 13:56:34 +11:00
Andres Rodriguez 2ab405d254 gallium: introduce PIPE_CAP_FENCE_SIGNAL v2
Protects semaphore signaling functionality required by GL_EXT_semaphore.

v2: s/semaphore/fence

Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-01-30 15:13:49 -05:00
Marek Olšák 63b231309e gallium: remove PIPE_CAP_USER_CONSTANT_BUFFERS
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
2018-01-17 20:18:00 +01:00
Marek Olšák e871abe452 gallium: remove PIPE_CAP_TEXTURE_SHADOW_MAP
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
2018-01-17 20:17:59 +01:00
Marek Olšák 3778a0a533 gallium: remove PIPE_CAP_TWO_SIDED_STENCIL
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
2018-01-17 20:17:59 +01:00
Rob Clark 0015217c1e gallium: plumb context priority through to driver
Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Andres Rodriguez <andresx7@gmail.com>
Reviewed-by: Wladimir J. van der Laan <laanwj@gmail.com>
2017-12-19 16:36:10 -05:00
Dave Airlie 2a06423c00 gallium: add CAPs to support HW atomic counters. (v3)
This looks like an evergreen specific feature, but with atomic
counters AMD have hw specific counters they use instead of operating
on buffers directly. These are separate to the buffer atomics,
so require different limits and code paths.

I've left the CAP for atomic type extensible in case someone
else has a variant on this sort of thing (freedreno maybe?)
and needs to change it.

This adds all the CAPs required to add support for those atomic
counters, along with a related CAP for limiting the number of
output resources.

I'd like to land this and the st patch then I can start to
upstream the evergreen support for these and other GL4.x features.

v2: drop the ATOMIC_COUNTER_MODE cap, just use the return
from the HW counters. If 0 we use the current mode.
v3: fix some rebase errors (Gert Wollny)

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-By: Gert Wollny <gw.fossdev@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-11-10 08:39:34 +10:00
Marek Olšák 24d6318d24 gallium: add PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET 2017-11-06 19:09:12 +01:00
Dave Airlie d3fdd66401 gallium: add cap for driver specified max combined shader resources.
Some hw (evergreen) has a limit on how many combined (images/buffers/mrts)
a fragment shader can access.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-11-01 10:07:03 +10:00
Eric Anholt ac0051a507 gallium: Create a new PIPE_CAP_TILE_RASTER_ORDER for vc4.
Because vc4 can control the order that tiles are rasterized in, we can use
it to implement overlapping blits using normal drawing and
GL_ARB_texture_barrier, as long as we can tell the kernel what order to
render the tiles in.

This commit introduces the core gallium support, vc4 changes will follow.

v2: Fix on the simulator.
v3: Add the cap (disabled) to other drivers, add rst docs for the cap.
v4: Rebase on PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS
v5: Drop vc4 changes from this commit, for clarity.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> (v3)
2017-10-10 10:45:22 -07:00
Marek Olšák 41b85158ab gallium: add PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-10-06 02:56:11 +02:00
Nicolai Hähnle cad959d901 gallium: add LDEXP TGSI instruction and corresponding cap
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
2017-09-29 12:08:01 +02:00
Gwan-gyeong Mun 5603670bc0 gallium/docs: add reference links for resource_create method
It adds reference links for arguments usage and bind of resource_create().

Signed-off-by: Mun Gwan-gyeong <elongbug@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-09-28 13:20:14 +01:00
Gwan-gyeong Mun c6c23e95a7 gallium/docs: fix a reference link for get_paramf
Previous get_paramf links same as get_param. It changes the reference link to
PIPE_CAPF_*

Signed-off-by: Mun Gwan-gyeong <elongbug@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-09-28 13:20:14 +01:00
Jan Vesely 9c87150618 gallium: Add PIPE_SHADER_CAP_INT64_ATOMICS
Denotes availability of 64bit int atomic instructions

Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-09-21 11:18:17 -04:00
Jan Vesely 7b2c5547c3 gallium: Add PIPE_SHADER_CAP_FP16
Denotes native half precision float operations capability
v2: PIPE_CAP_HALFS -> PIPE_SHADER_CAP_FP16
    fix indentation

Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-09-18 10:45:02 -04:00
Timothy Arceri c96e45ebf0 gallium: introduce PIPE_CAP_LOAD_CONSTBUF
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-09-15 11:42:55 +10:00
Nicolai Hähnle 37dd8e8dee gallium: all drivers should accept two-dimensional constant buffer indexing
Most older drivers seem to just ignore the Dimension setting, so virtually
no changes should be needed.

Acked-by: Roland Scheidegger <sroland@vmware.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2017-09-04 13:43:36 +02:00
Timothy Arceri 4e4042df6b gallium: introduce PIPE_CAP_MEMOBJ
This can be used to guard support for EXT_memory_object and related
extensions.

v2: update gallium docs

v3 (Timothy Arceri):
 - add cap to nv50

Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2017-08-03 13:57:16 +10:00
Nicolai Hähnle a677799e51 gallium: add PIPE_QUERY_SO_OVERFLOW_ANY_PREDICATE and corresponding cap
v2: rename cap to PIPE_CAP_QUERY_SO_OVERFLOW and be a bit more explicit
    in the documentation

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-08-02 09:37:10 +02:00
Nicolai Hähnle 01f1598a40 gallium: add PIPE_CAP_NIR_SAMPLERS_AS_DEREF
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-07-31 14:55:29 +02:00
Samuel Pitoiset 973822bcee gallium: add PIPE_CAP_BINDLESS_TEXTURE
Whether bindless texture operations are supported by the
underlying driver.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-06-14 10:04:36 +02:00
Marek Olšák 7448342a1f gallium/docs: clarify gen_name/get_vendor/get_device_vendor behavior
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-06-12 18:24:37 +02:00
Lyude 467af445a3 gallium: Add a cap to check if the driver supports ARB_post_depth_coverage
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2017-06-02 23:19:22 -04:00
Marek Olšák 50189379fa gallium: add PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION
for skipping mapped-buffer checking in every GL draw call

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-05-17 20:28:44 +02:00
Marek Olšák 70dcb7377d gallium: add PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEX
The next patch will use it. This is really for svga and GL2-level drivers.

Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2017-05-10 19:29:08 +02:00
Marek Olšák 22f6624ed3 gallium: separate indirect stuff from pipe_draw_info - 80 -> 56 bytes
For faster initialization of non-indirect draws.
2017-05-10 19:00:16 +02:00
Samuel Pitoiset 3a927e0aa3 gallium: add PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-04-26 19:15:34 +02:00
Nicolai Hähnle 17f24a9b75 gallium: add PIPE_CAP_TGSI_TES_LAYER_VIEWPORT
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
2017-04-14 22:49:44 +02:00
Nicolai Hähnle d3e6f6d7f7 gallium: add PIPE_CAP_TGSI_BALLOT
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-04-05 15:29:31 +02:00
Nicolai Hähnle d6e6fa01a5 gallium: add sparse buffer interface and capability
v2:
- explain the resource_commit interface in more detail

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-04-05 10:37:04 +02:00
Erik Faye-Lund 99d8b933fd gallium/docs: remove documentation of removed arg
geom was removed in e968975 ("gallium: remove the geom_flags param
from is_format_supported", Tue Mar 8 00:01:58 2011 +0100), but the
documentation of it was left over. Let's bring the documentation up
to date.

Signed-off-by: Erik Faye-Lund <kusmabite@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-04-01 13:39:52 +02:00
Lyude ffe2bd676f gallium: Add a cap to check if the driver supports fill_rectangle
Changes since v1:
- Add pipe caps for etnaviv, freedreno, swr and virgl

Signed-off-by: Lyude <lyude@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2017-03-31 21:41:24 -04:00
Marek Olšák 150736b5c3 gallium: remove support for predicates from TGSI (v2)
Neved used.

v2: gallivm: rename "pred" -> "exec_mask"
    etnaviv: remove the cap
    gallium: fix tgsi_instruction::Padding

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2017-04-01 00:06:41 +02:00
Nicolai Hähnle d0c7f924a3 gallium: add PIPE_CAP_TGSI CLOCK
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-03-31 07:56:25 +02:00
Marek Olšák bf3cdf0fd3 gallium: add PIPE_CAP_TGSI_TEX_TXF_LZ 2017-03-15 18:17:41 +01:00
Marek Olšák 4a883966c1 gallium: remove PIPE_CAP_USER_INDEX_BUFFERS
all drivers support it

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Tested-by: Brian Paul <brianp@vmware.com>  (VMware driver only)
2017-02-25 00:03:09 +01:00
Timothy Arceri 4be98ed5fd gallium: add get_disk_shader_cache() callback
V2: Provide more detail in callback description and add description to
    screen.rst

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-02-23 09:20:22 +11:00
Ilia Mirkin b090033087 gallium: add separate PIPE_CAP_INT64_DIVMOD
Nouveau does not currently have logic to implement this as a library
function. Even though such a library could be written, there's no big
advantage to do it that way for now given that int64 is a very uncommon
use-case. Allow a driver to expose INT64 without supporting division and
modulo operations.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-02-09 12:57:21 -05:00
Nicolai Hähnle a020cb3a72 gallium: turn PIPE_SHADER_CAP_DOUBLES into a screen capability
Make the cap consistent with PIPE_CAP_INT64.

Aside from the hypothetical case of using draw for vertex shaders (and
actually caring about doubles...), every implementation supports doubles
either nowhere or everywhere.

Also, st/mesa didn't even check the cap correctly in all supported
shader stages.

While at it, add a missing LLVM version check for 64-bit integers in
radeonsi. This is conservative: judging by the log, LLVM 3.8 might be
sufficient, but there are probably bugs that have been fixed since then.

v2: fix clover (Marek)

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-02-02 16:53:42 +01:00
Ilia Mirkin 6e40938fbc gallium: add PIPE_CAP_TGSI_MUL_ZERO_WINS
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Axel Davy <axel.davy@ens.fr>
2017-01-23 20:36:47 -05:00
Philipp Zabel 30853f55a3 gallium: add pipe_screen::resource_changed
Add a hook to tell drivers that an imported resource may have changed
and they need to update their internal derived resources.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
2017-01-20 15:30:29 +01:00
Ilia Mirkin ee3ebe68f9 gallium: add PIPE_CAP_TGSI_FS_FBFETCH
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-01-16 21:13:09 -05:00