Commit Graph

146558 Commits

Author SHA1 Message Date
Lionel Landwerlin d944136f36 vulkan/wsi/wayland: don't expose surface formats not fully supported
Depending on whether an application creates a swapchain with
VK_COMPOSITE_ALPHA_PRE_MULTIPLIED_BIT_KHR or not, we might use 2
different formats with the compositor.

This change makes sure that we support all the underlying formats
before exposing the corresponding VkFormat to the application.

v2: Don't forget get_formats2() (Ivan)

v3: Replace formats with availability boolean (Simon)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 151b65b211 ("vulkan/wsi/wayland: generalize modifier handling")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5522
Reviewed-by: Ivan Briano <ivan.briano@intel.com> (v2)
Reviewed-by: Simon Ser <contact@emersion.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13453>
2021-10-26 16:12:06 +03:00
Derek Foreman 1c4f1c2290 panfrost: support PIPE_RESOURCE_PARAM_NPLANES query
While panfrost doesn't support multi-planar formats directly, we might
still import multi-planar BOs through GBM (for example, when doing direct
scanout in weston).

We can support PIPE_RESOURCE_PARAM_NPLANES by simply counting the
planes we have.

Signed-off-by: Derek Foreman <derek.foreman@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Simon Ser <contact@emersion.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13039>
2021-10-26 12:19:11 +00:00
Derek Foreman f96ad5d71c panfrost: Support planar formats for scanout
While panfrost doesn't directly support planar formats, we can get here
from GBM. This happens, for example, when weston is trying to use a BO
for direct scanout.

Walk the list of planes to find the right one.

Signed-off-by: Derek Foreman <derek.foreman@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Simon Ser <contact@emersion.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13039>
2021-10-26 12:19:10 +00:00
Samuel Pitoiset 1cd43ff030 radv: lower the viewport index to zero when the VGT stage doesn't export it
This is allowed and the fragment shader should read zero.

No fossils db changes.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13222>
2021-10-26 08:37:12 +02:00
Ilia Mirkin fad6a80635 meson: build freedreno tools when other parts of freedreno not enabled
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Emma Anholt <emma@anholt.net>
Acked-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13510>
2021-10-26 00:33:31 +00:00
Ilia Mirkin 6c61494771 freedreno: support lua54
This is the default version in gentoo, and it apparently uses the lua54
variant rather than lua.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Emma Anholt <emma@anholt.net>
Acked-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13510>
2021-10-26 00:33:31 +00:00
Rob Clark d2a7afe34d freedreno/drm: Move suballoc_bo to device
Having it in msm_pipe isn't saving any locking.  But it does mean that
cleanup_fences() can drop the last pipe reference, which in turn drops
the last suballoc_bo reference, which can cause recursion back into the
bo cache.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5562
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13521>
2021-10-26 00:12:02 +00:00
Rob Clark 2c6fb9780c freedreno/drm: Add some asserts
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13521>
2021-10-26 00:12:02 +00:00
Marek Olšák 00a1eda61b mesa: add a no_error path to _mesa_handle_bind_buffer_gen
It only helps when it's inlined, which is true for glBindBuffer.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13513>
2021-10-25 19:53:17 +00:00
Marek Olšák 87b9a9667a mesa: remove redundant flagging USAGE_ARRAY_BUFFER
We do that in gl*Pointer, glBindVertexBuffer, etc.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13513>
2021-10-25 19:53:17 +00:00
Marek Olšák 2f059b861e mesa: move setting USAGE_PIXEL_PACK_BUFFER out of BindBuffer to reduce overhead
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13513>
2021-10-25 19:53:17 +00:00
Marek Olšák d3a134bbd7 mesa: remove USAGE_ELEMENT_ARRAY_BUFFER because it's unused and adding overhead
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13513>
2021-10-25 19:53:17 +00:00
Boris Brezillon 1813bb5917 vulkan: Fix entrypoint generation when compiling for x86 with MSVC
When compiling for x86 with MSVC, Vulkan API entry points follow the
__stdcall convention (VKAPI_CALL maps to __stdcall), which uses the
following name mangling:

   _<function_name>@<arguments_size>

Fix the vk_entrypoint_stub()/alternatename definitions accordingly.

Fixes: 6d44b21d4f ("vulkan: Fix weak symbol emulation when compiling with MSVC")
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13516>
2021-10-25 18:31:22 +00:00
Danylo Piliaiev b7c7abded7 nir/serialize: Make more space for intrinsic_op allowing 1024 ops
We are close to the limit of 512 intrinsics, make more space to
be able to support up to 1024 intrinsics.

Take one bit from packed_const_indices, they shouldn't suffer in
a common case.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13456>
2021-10-25 16:17:09 +00:00
Samuel Pitoiset dc74285d32 aco: only load streamout buffers if streamout is enabled
The streamout_config SGPR is used to determine if streamout is enabled.

This fixes a GPU hang with various transform feedback tests:
 - dEQP-GLES3.functional.transform_feedback.*
 - KHR-GL46.transform_feedback.api_errors_test
 - KHR-GL46.draw_indirect.basic-draw*-xfbPaused
 - KHR-GL46.geometry_shader.api.draw_calls_while_tf_is_paused

Cc: 21.3 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13514>
2021-10-25 13:43:10 +00:00
Samuel Pitoiset db82d90451 radv: report error messages when the driver can't be initialized
Not only with RADV_DEBUG=startup.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13343>
2021-10-25 14:13:46 +02:00
Samuel Pitoiset 4765edb4e0 radv: fix build errors with Android
Fixes: 49c3a88fad ("radv: implement VK_KHR_format_feature_flags2")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5518
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13450>
2021-10-25 06:45:47 +00:00
Samuel Pitoiset ae2881c0f5 radv: remove old RADV_TRACE_FILE warning
It has been replaced by RADV_DEBUG=hang a year ago.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13452>
2021-10-25 08:08:52 +02:00
Alyssa Rosenzweig c2d522b07f panfrost: Remove duplicated #if
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13208>
2021-10-23 02:21:13 +00:00
Alyssa Rosenzweig baaa88cf9e panfrost: Remove ancient TODO
This was implemented ages ago.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13208>
2021-10-23 02:21:13 +00:00
Alyssa Rosenzweig 2526f6f229 panfrost: Enable AFBC on v7
The bugs blocking this have been resolved, so flip on AFBC again and get
moar fps.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13205>
2021-10-22 21:55:32 -04:00
Alyssa Rosenzweig 789601a189 panfrost: Decompress for incompatible AFBC formats
AFBC is keyed to the format. Depending on the hardware, we'll get an
Invalid Data Fault or a GPU timeout if we attempt to sample from an
AFBC-compressed RGBA8 texture as R32F (for example).

Fixes Piglit ./bin/arb_texture_view-rendering-formats_gles3 with AFBC.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13205>
2021-10-22 21:55:32 -04:00
Alyssa Rosenzweig 93c9123c31 panfrost: Add internal afbc_formats
We need to know the internal (physical) formats used for AFBC of a given
logical format, in order to check format compatibility and determine if
we need to decompress AFBC for conformance.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13205>
2021-10-22 21:55:32 -04:00
Alyssa Rosenzweig 342ed4909f panfrost: Workaround ISSUE_TSIX_2033
According to mali_kbase, all Bifrost and Valhall GPUs are affected by
issue TSIX_2033. This hardware bug breaks the INTERSECT frame shader
mode when forcing clean_tile_writes. What does that mean?

The hardware considers a tile "clean" if it has been cleared but not
drawn to. Setting clean_tile_write forces the hardware to write back
such "clean" tiles to main memory.

Bifrost hardware supports frame shaders, which insert a rectangle into
every tile according to a configured rule. Frame shaders are used in
Panfrost to implement tile reloads (i.e. LOAD_OP_LOAD). Two modes are
relevant to the current discussion: ALWAYS, which always inserts a frame
shader, and INTERSECT, which tries to only insert where there is
geometry. Normally, we use INTERSECT for tile reloads as it is more
efficient than ALWAYS-- it allows us to skip reloads of tiles that are
discarded and never written back to memory.

From a software perspective, Panfrost's current logic is correct: if we
clear, we set clean_tile_writes, else we use an INTERSECT frame shader.
There is no software interaction between the two.

Unfortunately, there is a hardware interaction. The hardware forces
clean_tile_writes in certain circumstances when AFBC is used.
Ordinarily, this is a hardware implementation detail and invisible to
software. Unfortunately, this implicit clean tile write is enough to
trigger the hardware bug when using INTERSECT. As such, we need to
detect this case and use ALWAYS instead of INTERSECT for correct
results.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13205>
2021-10-22 21:55:32 -04:00
Alyssa Rosenzweig e0335ad888 panfrost: Fix gl_FragColor lowering
The gl_FragColor lowering in the fragment shader depends on the number
of render targets, which can change every set_framebuffer_state.
set_framebuffer_state thus needs to force a rebind of the fragment
shader.

Fixes a regression in Piglit fbo-drawbuffers-none gl_FragColor -auto
-fbo from enabling AFBC on Mali G52.

Fixes: 28ac4d1e00 ("panfrost: Call nir_lower_fragcolor based on key")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13498>
2021-10-23 00:02:53 +00:00
Alyssa Rosenzweig be5456e116 panfrost: Remove unused MIDGARD_NO_AFBC quirk
This is not Midgard-specific and is handled outside of the quirks
infrastructure now.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13497>
2021-10-22 19:33:38 -04:00
Alyssa Rosenzweig 68a7fafe2a panfrost,panvk: Use dev->has_afbc instead of quirks
This uses the new property for AFBC we've added. The AFBC quirk is
applied only to v4, and we only set dev->has_afbc on v5+ so this is not
a regression. It now respects the hardware-specific AFBC disable.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13497>
2021-10-22 19:33:38 -04:00
Alyssa Rosenzweig 3e168b97cc panfrost: Detect implementations support AFBC
AFBC is an optional feature on Bifrost. If it is missing, a bit will be
set in the poorly named AFBC_FEATURES register. Check this so we can act
appropriately.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13497>
2021-10-22 19:33:38 -04:00
Emma Anholt ebe9494b61 turnip: Drop the assertion about the temporary bit in sync fd imports.
Khronos's conclusion was that you only need the bit when you want
temporary and there's a choice between temporary and permanent.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13473>
2021-10-22 21:44:44 +00:00
Emma Anholt 8ccf672fa3 gallium/u_blitter: Read MSAA z/s from sampler's .x instead of .y or .z.
u_format defines depth formats as having depth in .x, mesa/st samples for
depth or stencil in .x (not making use of any other channels).
util_make_fs_blit_zs() looks for depth or stencil in .x.  The MSAA path
was the exception looking for it in .z or .y, which was causing drivers to
need to splat their values out to the other channels.  This should be
better on hardware that can emit shorter messages for sampling just the
first channels.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13446>
2021-10-22 18:31:20 +00:00
Paulo Zanoni 785dd68599 iris: also dump bo's imported and exported flags
My original patch also aligned the columns for better printing, but
Ken's recent suballocation series incorporated those changes. My
original patch was also printing the EXEC_OBJECT_ASYNC flag, but this
is not possible anymore as we don't have the validation list here. But
it's fine since EXEC_OBJECT_ASYNC is conditional on
iris_bo_is_external(), which is true for either exported or imported.

Example output:

BO list (length 13):
[ 0]:   8 (  8) command buffer @ 0xfffffffefffdd000 (system    65536B)  2 refs
[ 1]:   1 (  1) workaround     @ 0xfffffffefffff000 (system     4096B)  3 refs
[ 2]:  14 ( 14) dynamic state  @ 0x00000002fffef000 (system    65536B)  2 refs  write
[ 3]:   0 ( 10) miptree        @ 0xfffffffeffc00000 (system   471104B)  4 refs  write
[ 4]:  15 ( 15) shader kernels @ 0x00000000ffff7000 (system    16384B)  2 refs
[ 5]:   0 ( 13) buffer         @ 0xfffffffefe700000 (system  1048576B)  2 refs
[ 6]:   4 (  4) surface state  @ 0x00000001fffef000 (system    65536B)  2 refs
[ 7]:   3 (  3) binder         @ 0x0000000100000000 (system    65536B)  2 refs
[ 8]:  18 ( 18) miptree        @ 0xfffffffeffebd000 (system   524288B)  2 refs  write exported
[ 9]:  11 ( 11) buffer         @ 0xfffffffefe800000 (system 20971520B)  2 refs
[10]:   0 ( 13) buffer         @ 0xfffffffefe600000 (system  1048576B)  2 refs
[11]:  12 ( 12) shader kernels @ 0x00000000ffffb000 (system    16384B)  2 refs
[12]:   5 (  5) buffer         @ 0xfffffffeffffe000 (system     4096B)  2 refs  write

Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12654>
2021-10-22 16:54:42 +00:00
Marek Olšák 520300ad22 st/mesa: don't crash when draw indirect buffer has no storage
Fixes: 22f6624ed3 - gallium: separate indirect stuff from pipe_draw_info

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13471>
2021-10-22 16:25:28 +00:00
Matt Turner 2822b1345c tu: Expose required VK_FORMAT_FEATURE bits for planar YUV formats
Specifically this enables these VK_FORMAT_FEATURE bits:

  VK_FORMAT_FEATURE_TRANSFER_SRC_BIT
  VK_FORMAT_FEATURE_TRANSFER_DST_BIT
  VK_FORMAT_FEATURE_SAMPLED_IMAGE_YCBCR_CONVERSION_LINEAR_FILTER_BIT
  VK_FORMAT_FEATURE_SAMPLED_IMAGE_FILTER_MINMAX_BIT
  VK_FORMAT_FEATURE_SAMPLED_IMAGE_FILTER_LINEAR_BIT
  VK_FORMAT_FEATURE_SAMPLED_IMAGE_BIT
  VK_FORMAT_FEATURE_MIDPOINT_CHROMA_SAMPLES_BIT
  VK_FORMAT_FEATURE_COSITED_CHROMA_SAMPLES_BIT

Fixes the following tests:
  dEQP-VK.api.info.format_properties.g8_b8_r8_3plane_420_unorm
  dEQP-VK.api.info.format_properties.g8_b8r8_2plane_420_unorm
  dEQP-VK.api.info.image_format_properties.2d.optimal.g8_b8_r8_3plane_420_unorm
  dEQP-VK.api.info.image_format_properties.2d.optimal.g8_b8r8_2plane_420_unorm

Additionally allows 339 tests in dEQP-VK.ycbcr.* to go from Skip to
Pass.

[ Connor: Fake support for 3-plane formats, fixup modifiers path ]

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6792>
2021-10-22 11:25:31 +00:00
Jonathan Marek 330a8cfa07 turnip: enable UBWC for NV12
Use the special format for accessing the Y plane of UBWC-enabled NV12, and
enable UBWC for NV12.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6792>
2021-10-22 11:25:30 +00:00
Connor Abbott 9c895e133b tu: Emit GRAS_LRZ_MRT_BUF_INFO_0
The blob seems to always emit this, even though it seems to only be used
when rendering to the special planar formats (which we only do in the
blit path). Based on the LRZ prefix it might used in other cases though.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6792>
2021-10-22 11:25:30 +00:00
Connor Abbott c135c2cdb7 freedreno/a6xx: Rename GRAS_2D_BLIT_INFO
It's not actually used for 2d blits, it's supposed to mirror
RB_MRT_BUF_INFO[0].COLOR_FORMAT and seems to be used only when rendering
to the special planar formats, although the blob name seems to suggest
it's connected to LRZ.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6792>
2021-10-22 11:25:30 +00:00
Jonathan Marek 8ea6f17fdf freedreno/layout: Fix the UBWC block size for the Y plane
Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6792>
2021-10-22 11:25:30 +00:00
Matt Turner e0a74c7cad util/format: Add PIPE_FORMAT_Y8_UNORM as an "other" layout format
freedreno has a different layout for tiled Y8 planes from normal R8
textures, so we need to be able to talk about them separately.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6792>
2021-10-22 11:25:30 +00:00
Iago Toral Quiroga ceaf56920c v3dv: refactor TFU jobs
We had an implementation for image copies and another for buffer to
image copies. Refactor the code so we have a single implementation
of this.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13481>
2021-10-22 11:05:33 +00:00
Tapani Pälli 1465ec8cf3 iris: clear bos_written when resetting a batch
This fixes dEQP-EGL.functional.sharing.gles2.multithread.* tests that
are hitting: "iris: Failed to submit batchbuffer: Invalid argument"
error.

v2: clear on reset rather than clear 'on-the-fly' (Kenneth Graunke)

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5537
Fixes: e4c3d3efc7 ("iris: Defer construction of the validation (exec_object2) list")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13464>
2021-10-22 09:37:50 +00:00
Samuel Pitoiset b6a69dbb40 radv: re-emit prolog inputs when the nontrivial divisors state changed
If the application first uses nontrivial divisors, the driver emits
the vertex shader VA to the upload BO rather than directly via the
user SGPRs locations. But, if the vertex input dynamic state changes,
the driver might select a different VS prolog that no longer needs
nontrivial divisors.

In this case, the driver needs to re-emit the prolog inputs because
otherwise the VS prolog will jump to the PC that is emitted via the
user SGPR locations, and the previous one was somewhere in the
upload BO...

This fixes a GPU hang with Bioshock and Zink.

Fixes: d9c7a17542 ("radv: enable VK_EXT_vertex_input_dynamic_state")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13377>
2021-10-22 09:47:50 +02:00
Samuel Pitoiset 8ec6824335 radv,aco: decouple shader_info/options from radv_shader_args
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13287>
2021-10-22 07:10:40 +00:00
Kenneth Graunke 1429feaf29 crocus: Replace devinfo->ver[x10] checks with GFX_VER[x10]
These files are compiled per-generation, so we can just use the #define
instead of the actual field dereference to allow the compiler to dead
code eliminate whole paths.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13475>
2021-10-22 06:19:15 +00:00
Iago Toral Quiroga 1561d0126a broadcom/compiler: fix assert that current instruction must be in current block
This was not considering the possibility that the driver has called
nir_before_block() or nir_after_block() to update the cursor, in which
case the cursor link points to the instruction list header and not
to an actual instruction.

Fixes incorrect debug-assert crash in:
dEQP-VK.graphicsfuzz.cov-increment-vector-component-with-matrix-copy

Fixes: 265515fa62 ("broadcom/compiler: check instruction belongs to current block")
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13467>
2021-10-22 05:39:05 +00:00
Kenneth Graunke e79e1ca304 intel: Drop Tigerlake revision 0 workarounds
Tigerlake revision 0 is an early stepping that should not be used in
production anywhere, so this code was only used for hardware bringup.
We can drop the unnecessary workarounds.  This also keeps them from
triggering on early steppings of other Gfx12 parts.

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13266>
2021-10-21 16:53:43 -07:00
Marek Olšák 6ef192bddf mesa: discard draws with count=0 to decrease overhead
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13445>
2021-10-21 21:16:13 +00:00
Nanley Chery 7daff157bb iris: Refactor the assignment to possible_usages
* Make the outer if-ladder dependent on the has_* variables.
* Make the possible_usages assignments happen at the same nesting level.
* Move the combined HIZ/MCS assert closer to relevant if-else blocks.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11960>
2021-10-21 20:21:26 +00:00
Nanley Chery 114f87c1c7 iris: Set DISABLE_AUX_BIT for AUX_USAGE_NONE modifiers
This avoids unnecessary surface padding on TGL+.

Also, drop some of the logic to handle modifiers in
iris_resource_configure_aux as the bit now causes it to be handled
implicitly.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11960>
2021-10-21 20:21:26 +00:00
Nanley Chery b9d8793646 iris: Disable the MC_CCS modifier with norbc
We generally try to disable CCS whenever the norbc debug flag is set.
Also, this enables simplifying iris_resource_configure_aux later on.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11960>
2021-10-21 20:21:26 +00:00
Nanley Chery b71264e465 iris: Convert some mod_info checks to asserts
Depth and multisample images aren't supported with modifiers. So,
instead of checking for the absence of modifiers before adding HiZ or
MCS, simply assert that they aren't present at a more convenient time.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11960>
2021-10-21 20:21:26 +00:00