Commit Graph

6836 Commits

Author SHA1 Message Date
Samuel Pitoiset 435bff34e3 ac/rgp: report the number of memory operations per clock
So that RGP reports the memory type and the memory throughput.
Based on AMDVLK.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9303>
2021-02-26 18:05:45 +01:00
Samuel Pitoiset c2271f66ea ac/rgp: report LDS size in CU mode on GFX10+
RGP expects that.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9303>
2021-02-26 18:05:43 +01:00
Samuel Pitoiset ceded1d0a2 ac/rgp: recognize more memory types
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9303>
2021-02-26 18:05:42 +01:00
Rhys Perry c3af0c2079 aco: use p_as_uniform for get_sampler_desc and convert_pointer_to_64_bit
Since value-numbering no longer works across loops, we no longer need to
use v_readfirstlane_b32.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9288>
2021-02-26 13:33:56 +00:00
Rhys Perry 5f1b354472 aco: calculate all p_as_uniform and v_readfirstlane_b32 sources in WQM
We should avoid a situation where a v_readfirstlane_b32 is in WQM but it's
source is calculated in Exact.

Fixes hang when running Assassin's Creed: Valhalla benchmark.

fossil-db (GFX10.3):
Totals from 1021 (0.70% of 146267) affected shaders:
CodeSize: 7835228 -> 7842992 (+0.10%); split: -0.00%, +0.10%
Instrs: 1519208 -> 1521149 (+0.13%); split: -0.00%, +0.13%
SClause: 78921 -> 78920 (-0.00%)
Copies: 44456 -> 45421 (+2.17%); split: -0.05%, +2.22%
Branches: 12987 -> 13933 (+7.28%)
PreSGPRs: 47599 -> 47813 (+0.45%)
Cycles: 10037540 -> 10045304 (+0.08%); split: -0.00%, +0.08%
VMEM: 538381 -> 538777 (+0.07%); split: +0.11%, -0.03%
SMEM: 84553 -> 84554 (+0.00%); split: +0.01%, -0.01%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9288>
2021-02-26 13:33:56 +00:00
Daniel Schürmann 690ac7409a aco/value_numbering: use can_eliminate() function to avoid unnecessary hashmap lookups
No fossil-db changes.

Reviewed-by: Tony Wasserka <tony.wasserka@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9195>
2021-02-25 11:35:42 +01:00
Daniel Schürmann fbf791e70c aco: value number VOPC instructions with different exec masks
This becomes possible as long as we do

   val = s_and_b32/64 exec, val

before any subgroup operations.

This precautional instruction can be removed by the
optimizer if 'val' was computed by a VOPC instruction
using the same exec mask.

Totals from 59 (0.04% of 146267) affected shaders (Navi10):
VGPRs: 2808 -> 2816 (+0.28%)
CodeSize: 340888 -> 340852 (-0.01%); split: -0.20%, +0.19%
Instrs: 61733 -> 61625 (-0.17%); split: -0.18%, +0.01%
Cycles: 470636 -> 469112 (-0.32%); split: -0.33%, +0.01%
VMEM: 8091 -> 7993 (-1.21%)
SMEM: 2736 -> 2719 (-0.62%); split: +0.29%, -0.91%
VClause: 1745 -> 1741 (-0.23%)
SClause: 2394 -> 2392 (-0.08%); split: -0.25%, +0.17%
Copies: 3249 -> 3253 (+0.12%); split: -0.62%, +0.74%
Branches: 1210 -> 1206 (-0.33%)
PreSGPRs: 3126 -> 3176 (+1.60%); split: -0.16%, +1.76%

Reviewed-by: Tony Wasserka <tony.wasserka@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9195>
2021-02-25 11:35:42 +01:00
Samuel Pitoiset 8a47422d97 radv: do not scale the depth bias for D16_UNORM depth surfaces
Scaling the depth bias doesn't seem correct with Vulkan. This is
probably the root cause of the shadow artifacts differences between
RADV and AMDVLK/AMDGPU-PRO.

Fix dEQP-VK.rasterization.depth_bias.d16_unorm.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2217
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9249>
2021-02-25 08:17:27 +01:00
Eric Anholt bcea453d4a ci/piglit: Stop including the test counts at the end of expectations.
It's just a ton of fuss for driver developers fixing piglit tests.  This
makes the trace expectation files pretty silly (empty expectation, but
you'll get a diff to a non-empty result when something fails)

Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Adam Jackson <ajax@redhat.com>
Acked-by: Andres Gomez <agomez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9226>
2021-02-24 18:55:02 +00:00
Mike Blumenkrantz 6875e10350 radv: for_each_bit -> foreach_bit
Reviewed-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9191>
2021-02-24 17:11:44 +00:00
Mauro Rossi 6635a47038 android: ac/rgp: fix building error
Include "util/list.h" as per "util/simple_mtx.h" one line later

Fixes the following building error in Android:

In file included from external/mesa/src/amd/common/ac_rgp.c:24:
external/mesa/src/amd/common/ac_rgp.h:31:10: fatal error: 'list.h' file not found
         ^~~~~~~~
1 error generated.

Fixes: 12515d6b ("ac/rgp: add rgp co, col, pso data structures")
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4334
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9202>
2021-02-23 18:26:42 +00:00
Bas Nieuwenhuizen d7e1f492bc radv: Disable displayable DCC for GFX8 properly.
On scanout the GFX8 ac_surface doesn't clear the size but only
doesn't allocate space and hence dcc_offset is 0. This is the same
as radeonsi.

Fixes: 7acb30de8a ("radv: Enable displayable DCC.")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4346
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9221>
2021-02-23 16:57:04 +00:00
Jan Beich 97ff5160d1 ac/rgp: define EM_AMDGPU if missing for compatibility
EM_AMDGPU isn't defined on DragonFly, FreeBSD, OpenBSD, so use the
same workaround as ac_rtld.c.

src/amd/common/ac_rgp_elf_object_pack.c:382:24: error: use of undeclared identifier 'EM_AMDGPU'
   elf_hdr.e_machine = EM_AMDGPU;
                       ^

Fixes: 110bb2c77d ("ac/rgp: add helper function to write rgp elf oject")
Reviewed-by: Mauro Rossi <issor.oruam@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9169>
2021-02-23 15:19:41 +00:00
Jan Beich ec35c4b57c ac: prefer system EM_AMDGPU definition
May improve compatibility with systems where EM_AMDGPU value is
different from Linux.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9169>
2021-02-23 15:19:41 +00:00
Daniel Schürmann ffebe48013 aco: don't rematerialize exec
Since exec is not considered a temporary anymore,
we accidentally allowed to rematerialize it.

Fixes: a56ddca4e8 ('aco: make all exec accesses non-temporaries')
Closes: #4327

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9215>
2021-02-23 14:41:31 +00:00
Samuel Pitoiset 765097eac4 radv: add support for instruction timing with RGP
This is probably the most useful feature with SQTT/RGP.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9130>
2021-02-23 13:03:39 +00:00
Samuel Pitoiset a72b7a9b6c radv: add support for exporting pipelines with RGP
This is still experimental and only enabled with
RADV_THREAD_TRACE_PIPELINE to avoid breaking existing support.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9130>
2021-02-23 13:03:39 +00:00
Samuel Pitoiset 884e14d784 radv: store a pointer to the code in radv_shader_variant
This will be used by SQTT to dump the disassembly.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9130>
2021-02-23 13:03:39 +00:00
Bas Nieuwenhuizen 7acb30de8a radv: Enable displayable DCC.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9042>
2021-02-23 13:32:42 +01:00
Bas Nieuwenhuizen f848f2adfa radv: Use ac_surface DCC settings for shareable images.
On GFX10 the settings for displayable DCC are different than those
for normal texturing.

This is technically a slight pessimization as ac_surface does not
know about textures that don't have to be sampled. However, for color
surfaces this is a very unlikely situation as presumably even MSAA
images have to be resolved (potentially using texture HW).

So in practice this should be equal for everything except displayable DCC.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9042>
2021-02-23 13:32:36 +01:00
Bas Nieuwenhuizen 0e189dd3fd radv: Add DCC info to the metadata.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9042>
2021-02-23 13:32:33 +01:00
Bas Nieuwenhuizen 54f3ed224d radv: Implement displayable DCC retiling.
Straightforward implementation using the retile map from radeonsi.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9042>
2021-02-23 13:32:29 +01:00
Bas Nieuwenhuizen e34542bdf1 radv: Implement initialization of displayable DCC.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9042>
2021-02-23 13:32:26 +01:00
Bas Nieuwenhuizen d78389ea5f amd/common: Add retile map size helper.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9042>
2021-02-23 13:32:23 +01:00
Bas Nieuwenhuizen e59847f67f radv: Use shared code for setting opaque metadata.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9042>
2021-02-23 13:32:20 +01:00
Bas Nieuwenhuizen 9c5c995cbe radv: Handle UMD metadata on import.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9042>
2021-02-23 13:32:16 +01:00
Bas Nieuwenhuizen 1a88805ded amd/common: constify ac_surface_set_umd_metata.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9042>
2021-02-23 13:31:55 +01:00
Rhys Perry 75c9adf039 aco/lower_phis: fix all_preds_uniform with continue_or_break
Found in a Death Stranding shader with loop unrolling disabled.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Fixes: 9a089baff1 ("aco: optimize boolean phis with uniform selections")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9193>
2021-02-23 10:46:56 +00:00
Eric Anholt 60d413b894 ci: Move the piglit expectations lists to the per-driver CI dirs.
Now changing piglit expectations won't retest everyone else's drivers.

Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9161>
2021-02-22 23:02:43 +00:00
Eric Anholt ad77170b85 ci: Move the dEQP and traces expectations to the per-driver CI dirs.
This means less custom test-source-dep stuff for these drivers, though it
means that touching the CI expects files will cause a bit more retesting:

- broadcom drivers retest as a group (but Igalia requested that
  organization of CI files)
- radv+radeonsi retest as a group
- lvp+llvmpipe retest as a group

Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9161>
2021-02-22 23:02:42 +00:00
Samuel Pitoiset 0d5a88c6cb ac/rgp: fill CPU info by parsing /proc/cpuinfo
The current CPU clock speed can't be retrieved from CPUID, so I think
parsing /proc/cpuinfo for all information is fine.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9133>
2021-02-22 16:16:25 +00:00
Bas Nieuwenhuizen 2d520b6923 radv: Don't use dedicated memory info to indicate sharing.
Can be used without sharing, so if only the dedicated memory info
is set we know it isn't shareable. Use that.

Fixes: a639d40f13 ("radv: add support for local bos. (v3)")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4330
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9176>
2021-02-22 13:08:40 +00:00
Samuel Pitoiset e5d8b731e4 radv: emit missing subpass resolve marker for SQTT
RGP now shows CmdEndRenderPassResolve() in the Event timing panel.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9106>
2021-02-22 08:30:38 +01:00
Samuel Pitoiset 491a1949eb radv: rework radv_cmd_buffer_resolve_subpass() a bit
To emit the subpass resolve marker properly.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9106>
2021-02-22 08:30:36 +01:00
Vinson Lee 7cc83f237e aco: Initialize ds_state.front.writeMask.
Fix defect reported by Coverity Scan.

Uninitialized scalar variable (UNINIT)
uninit_use: Using uninitialized value ds_state.front. Field ds_state.front.writeMask is uninitialized.

Fixes: d488d0fd7b ("aco: add framework for testing isel and integration tests")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9033>
2021-02-21 19:33:00 -08:00
Dave Airlie bd98fc39ae radv: reset object base on recycled command buffers
The loader_set_dispatch overwrites the magic with the dispatch
pointer, however when cmd buffers get recycled, and the loader
is in debug mode, it asserts that the magic isn't set anymore.

When recycling command buffers, reset the base object.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9145>
2021-02-22 09:32:45 +10:00
Eric Anholt dab845d457 ci: Move specific driver testing to separate files in separate dirs.
The top-level gitlab-ci.yml is big and unwieldy when one wants to work on
CI for a single driver.  Move the drivers to separate include files for
ease of finding all your driver's tests, and also to pave the way for work
on a single driver's CI to not retest all other drivers.

Reviewed-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9139>
2021-02-19 17:30:36 +00:00
Yogesh Mohan Marimuthu 455ca9226a ac/rgp: set gfxip in elf_hdr.e_flags
This patch will set the gfxip into elf_hdr.e_flags by reading data
from struct rad_info->chip_class instead of hardcoding.

v2: remove unused #define

Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8609>
2021-02-19 14:29:47 +00:00
Yogesh Mohan Marimuthu 9ce8b5024a ac/rgp: dump co, col, pso database to rgp profile file
This patch dumps code object, code object loader events, pso correlation
databses to given rgp profile file. The data to dump is taken from
struct rgp_code_object, struct rgp_loader_events and
struct rgp_pso_correlation.

v2: fix sqtt_file structure name to match existing names in file.
    fix checking wrong variable for pso correlation record_count.
    remove freeing rgp database here.

Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8609>
2021-02-19 14:29:47 +00:00
Yogesh Mohan Marimuthu 5d51ccd7d1 ac/rgp,radeonsi,radv: pass struct thread_trace_data to ac_sqtt_dump_data()
struct thread_trace_data holds struct rgp_code_object, struct
rgp_loader_events, struct rgp_pso_correlation data. This data is required
in function ac_sqtt_dump_data(). This patch makes the code changes
required to pass struct thread_trace_data to function ac_sqtt_dump_data().

Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8609>
2021-02-19 14:29:47 +00:00
Yogesh Mohan Marimuthu c544e56fb5 ac/rgp: expose data structure to populate co, col, pso database
This patch exposes struct rgp_code_object, struct rgp_loader_events and
struct rgp_pso_correlation into struct ac_thread_trace_data. Other modules
can fill in this data structure. The code object, code object loader events,
pso correlation database is written to rgp profile file using data from
these data structure exposed by this patch.

v2: move the data structures to struct ac_thread_trace_data

Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8609>
2021-02-19 14:29:47 +00:00
Yogesh Mohan Marimuthu 110bb2c77d ac/rgp: add helper function to write rgp elf oject
This patch adds helper function ac_rgp_write_elf_object() which
creates elf object from struct rgp_code_object_record. The elf
object is written to given output rgp profile file.

v2: for newly added files, change copyright year from 2020 to 2021
v3: fix 32bit compilation failure

Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8609>
2021-02-19 14:29:47 +00:00
Yogesh Mohan Marimuthu 12515d6b59 ac/rgp: add rgp co, col, pso data structures
This patch adds data structures used to collect data for code object,
code object loader event and pso correlation databases present in
a rgp profile.

v2: fix code review comments from Pierre-Eric
v3: Make loader_event_type into enum

Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8609>
2021-02-19 14:29:47 +00:00
Yogesh Mohan Marimuthu 27ff46bde6 ac/rgp: add ac_msgpack.h/c
This patch adds functions to create msgpack formatted data.
For msgpack specification refer to
github.com/msgpack/msgpack/blob/master/spec.md

This patch only adds formats from msgpac specification that
are required for rgp profile data.

v2: for newly added files, change copyright year from 2020 to 2021

Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8609>
2021-02-19 14:29:46 +00:00
Samuel Pitoiset 88f42ea93e radv: emit the trap handler registers earlier
Directly into the GFX init IB.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9076>
2021-02-19 08:58:19 +00:00
Samuel Pitoiset 2c6104d3d1 radv: make the TMA/TBA BOs resident buffers
They are always used if the trap handler is enabled.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9076>
2021-02-19 08:58:19 +00:00
Samuel Pitoiset 918838cd24 radv: make the trace BO a resident buffer
It's always used if RADV_DEBUG=hang is set.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9076>
2021-02-19 08:58:19 +00:00
Samuel Pitoiset d96c0a2263 radv: make the border color BO a resident buffer
It's always used if the feature is enabled.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9076>
2021-02-19 08:58:19 +00:00
Samuel Pitoiset e3bdf815b7 radv: set correct value for OFFCHIP_BUFFERING on GFX10+
Higher values break tessellation. I was only able to reproduce this
by switching back/from AMDVLK which was really weird...

According to Marek (1c6eca23fd), it looks like it's related to
register shadowing and PAL enables it, that probably explains a bit.

Copied from PAL and RadeonSI.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4207
Gitlab: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2498
Fixes: 74d69299d1 ("radv/gfx10: double the number of tessellation offchip buffers per SE")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9141>
2021-02-19 08:52:26 +01:00
Timur Kristóf a6e1178f91 aco: Disallow LSHS temp-only I/O when VS output is written indirectly.
Cc: mesa-stable
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9100>
2021-02-18 12:10:56 +00:00