Commit Graph

99165 Commits

Author SHA1 Message Date
Jon Turney 3c35dad1df meson: Set with_dri from with_gallium when DRI glx is explicitly configured
Set with_dri from with_gallium when DRI GLX is explicitly configured, as
well as when DRI GLX is chosen automatically.

Signed-off-by: Jon Turney <jon.turney@dronecode.org.uk>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
2018-01-17 18:05:18 +00:00
George Kyriazis 22a2027dd7 meson: add llvm dependency for swr build
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
2018-01-17 11:38:57 -06:00
Leo Liu d1833b8cd8 st/va: add break for MPEG4 data buffer handling case
Signed-off-by: Leo Liu <leo.liu@amd.com>
2018-01-17 08:31:38 -05:00
Leo Liu 3d0b561f34 st/va: remove TODO line for JPEG data buffer handling
Nothing to do

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2018-01-17 08:31:38 -05:00
Rhys Kidd 996a397719 i915: No longer rely on compatability define in intel_bufmgr.h
Symbol rename from dri_* to drm_intel_* introduced a number of compatability
defines within intel_bufmgr.h.

Replace the old function with the new function, consistent with the balance
of this file.

Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2018-01-17 08:08:04 -05:00
Timothy Arceri 1256ab18c1 radeonsi: bump glsl version to 450 for nir backend
We still have more work to do but piglit results are looking
pretty good.

At GLSL 1.50 we have 30647/31118 piglit tests passing.
At GLSL 4.50 we have 37927/38551 piglit tests passing.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2018-01-18 00:03:33 +11:00
Timothy Arceri b282207c32 radeonsi/nir: add some missing tcs bits to the nir scan pass
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2018-01-18 00:03:33 +11:00
Timothy Arceri 7898eb9a60 ac: rework load_tcs_{inputs,outputs}
This shares more code and calls the new shared load_tess_varyings()
abi so that the radeonsi nir path now supports tcs output loads.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2018-01-18 00:03:33 +11:00
Timothy Arceri 9622b445c8 ac/radeonsi: add tcs load outputs support
The code to load outputs is essentially the same as load inputs
so we make the interface more generic to maximise code sharing.

We will make use of the new support in the following patch.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2018-01-18 00:03:33 +11:00
Timothy Arceri a20016d827 st/glsl_to_tgsi: add ARB_get_program_binary support using TGSI
This resolves a game bug in Dead Island. The game doesn't properly
handle ARB_get_program_binary with 0 supported formats, and ends up
crashing.

This will enable ARB_get_program_binary binary support for any
driver that currently enables the on-disk shader cache.

Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=85564
2018-01-17 23:43:28 +11:00
Timothy Arceri a34262aed7 st/glsl_to_tgsi: add st_get_program_binary_driver_sha1() helper
This will be used by ARB_get_program_binary.

Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2018-01-17 23:43:28 +11:00
Timothy Arceri 9eebc55cc2 st/glsl_to_tgsi: add (de)serialise program helpers
These will be shared between the on-disk shader cache and
ARB_get_program_binary.

Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2018-01-17 23:43:28 +11:00
Timothy Arceri dbf7e483b4 st/glsl_to_tgsi: stop passing pipe_shader_state to st_store_tgsi_in_disk_cache()
We can instead just get this from st_*_program.

V2: store tokens to to st_compute_program before attempting to
    write to cache (fixes crash).

Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2018-01-17 23:43:28 +11:00
Timothy Arceri c69b0dd681 st/glsl_to_tgsi: store num_tgsi_tokens in st_*_program
We will need this for ARB_get_program_binary binary support.

Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2018-01-17 23:43:28 +11:00
Michel Dänzer 7b0e8264dd loader/dri3: Try to make sure we only process our own NotifyMSC events
We were using a sequence counter value to wait for a specific NotifyMSC
event. However, we can receive events from other clients as well, which
may already be using higher sequence numbers than us. In that case, we
could stop processing after an event from another client, which could
have been received significantly earlier. This would have multiple
undesirable effects:

* The computed MSC and UST values would be lower than they should be
* We could leave a growing number of NotifyMSC events from ourselves and
  other clients in XCB's special event queue

I ran into this with Firefox and Thunderbird, whose VSync threads both
seem to use the same window. The result was sluggish screen updates and
growing memory consumption in one of them.

Fix this by checking the XCB sequence number and MSC value of NotifyMSC
events, instead of using our own sequence number.

v2:
* Use the Present event ID for the sequence parameter of the
  PresentNotifyMSC request, as another safeguard against processing
  events from other clients
* Rebase on drawable mutex changes

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> # v1
2018-01-17 11:40:22 +01:00
Bas Nieuwenhuizen 0b8991c0b6 radv: Implement VK_EXT_debug_report.
This is not hooked up to any messages yet, but useful for e.g.
renderdoc if you add some messages during development.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2018-01-17 11:29:04 +01:00
Bas Nieuwenhuizen e5b1bd6ab8 vulkan: move anv VK_EXT_debug_report implementation to common code.
For also using it in radv. I moved the remaining stubs back to
anv_device.c as they were just trivial.

This does not move the vk_errorf/anv_perf_warn or the object
type macros, as those depend on anv types and logging.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2018-01-17 11:27:52 +01:00
Timothy Arceri f69cbb2b53 st/glsl_to_nir: disable io lowering to temps for tess
Lowering these to temps makes a big mess, and results in some
piglit test failures. Also the radeonsi backend (the only backend
to support tess) has support for indirects so there is no need to
lower them anyway.

Fixes the following piglit tests on radeonsi:

tests/spec/arb_tessellation_shader/execution/variable-indexing/tes-input-array-vec3-index-rd.shader_test
tests/spec/arb_tessellation_shader/execution/variable-indexing/tes-input-array-vec4-index-rd.shader_test

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-01-17 17:14:14 +11:00
Jason Ekstrand af10ce21ff i965: Enable CCS_E sampling of sRGB textures as UNORM
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2018-01-16 21:41:32 -08:00
Jason Ekstrand 96aa558715 i965/draw: Do resolves properly for textures used by TXF
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2018-01-16 21:41:32 -08:00
Jason Ekstrand 361e1df1ed i965/miptree: Refactor CCS_E and CCS_D cases in render_aux_usage
This commit unifies the CCS_E and CCS_D cases.  This should fix a couple
of subtle issues.  One is that when you use INTEL_DEBUG=norbc to disable
CCS_E, we don't get the sRGB blending workaround.  By unifying the code,
we give CCS_D that workaround as well.

The second issue fixed by this refactor is that the blending workaround
was appears to be enabled on all gens but really only applies on gen9.
Due to a happy accident in the way code was laid out, it was only
getting enabled on gen9: gen8 and earlier don't support non-zero-one
clear colors, and gen10 supports sRGB for CCS_E so it got caught in the
format_ccs_e_compat_with_miptree case.  This refactor moves it above the
format_ccs_e_compat_with_miptree case so it's an explicit early exit and
makes it explicitly only on gen9.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "17.3" <mesa-stable@lists.freedesktop.org>
2018-01-16 21:41:32 -08:00
Jason Ekstrand f79bb2e651 Re-enable regular fast-clears (CCS_D) on gen9+
This reverts commit ee57b15ec7, "i965:
Disable regular fast-clears (CCS_D) on gen9+".  How taht we've fixed the
issue with too many different aux usages in the render cache, it should
be safe to re-enable CCS_D for sRGB.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104163
Tested-by: Eero Tamminen <eero.t.tamminen@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "17.3" <mesa-stable@lists.freedesktop.org>
2018-01-16 21:41:32 -08:00
Jason Ekstrand d84275b884 i965: Track format and aux usage in the render cache
This lets us perform render cache flushes whenever a surface goes from
being used with one aux+format to a different aux+format.

This is the "proper" fix for https://bugs.freedesktop.org/102435.
ee57b15ec7 which was really just a partial
revert of 3e57e9494c was just a hack to
get rid of a hang in a bunch of Valve games.  This solves the actual
problem responsible for the hang and lets us enable CCS_E once again.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102435
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "17.3" <mesa-stable@lists.freedesktop.org>
2018-01-16 21:41:32 -08:00
Jason Ekstrand 622786c20c i965: Call brw_cache_flush_for_render in predraw_resolve_framebuffer
This makes sure we flush things out of other caches prior to using a
surface through the render cache.  Currently, this is a no-op because GL
won't let you bind anything other than a color surface as color so it
should never end up in the depth cache.  However, this does complete the
flush/add_bo pair for regular drawing which will be required for the
next commit.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "17.3" <mesa-stable@lists.freedesktop.org>
2018-01-16 21:41:32 -08:00
Francisco Jerez 53d8508f1d i965/gen6-7/sol: Bump primitive counter BO size.
Improves performance of SynMark2 OglGSCloth by a further 9.65%±0.59%
due to the reduction in overwraps of the primitive count buffer that
lead to a CPU stall on previous rendering.  Cummulative performance
improvement from the series 81.50% ±0.96% (data gathered on VLV).

Tested-By: Eero Tamminen <eero.t.tamminen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2018-01-16 16:03:56 -08:00
Francisco Jerez f476b3f6e7 i965/gen6-7/sol: Keep independent counters for the current and previous begin/end block.
This allows us to aggregate the primitive counts of a completed
transform feedback begin/end block lazily, which in the most typical
case (where glDrawTransformFeedback is not used) will allow us to
avoid aggregating the primitive counters on the CPU altogether,
preventing a stall on previous rendering during
glBeginTransformFeedback(), which dramatically improves performance of
applications that rely heavily on transform feedback.

Improves performance of SynMark2 OglGSCloth by 65.52% ±0.25% (data
gathered on VLV).

Tested-By: Eero Tamminen <eero.t.tamminen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2018-01-16 16:03:48 -08:00
Francisco Jerez b0c8d61281 i965/gen6-7/sol: Restructure primitive counter into a separate type.
A primitive counter encapsulates a scalar aggregating counter for each
vertex stream along with a section within the primitive tally buffer
which hasn't been read out yet.  Defining this as a separate type will
allow us to keep multiple counter objects around for the same
transform feedback object without any code duplication.

Tested-By: Eero Tamminen <eero.t.tamminen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2018-01-16 16:03:42 -08:00
Timothy Arceri dc520dafdc st/mesa: enable ARB_enhanced_layouts on nir drivers
I'm guessing this may have been disable because of missing
component packing support. However recent nir linking changes
required nir based gallium drivers to support component packing
so this should now be ok to enable.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-01-17 10:42:55 +11:00
Roland Scheidegger b0413cfd8b draw: remove VSPLIT_CREATE_IDX macro
Just inline the little bit of code.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2018-01-17 00:01:19 +01:00
Roland Scheidegger 1f462eaf39 draw: fix vsplit code when the (post-bias) index value is -1
vsplit_add_cache uses the post-bias index for hashing, but the
vsplit_add_cache_uint/ushort/ubyte ones used the pre-bias index, therefore
the code for handling the special case (because -1 matches the initialization
value of the cache) wasn't actually working.
Commit 78a997f728 actually simplified the
cache logic somewhat, but it looks like this particular problem carried over
(and duplicated to the ushort/ubyte cases, since before only uint needed it).
This could lead to the vsplit cache doing the wrong thing, in particular
later fetch_info might indicate there are 0 values to fetch. This only really
affected edge cases which were bogus to begin with, but it could lead to a
crash with the jit vertex shader, since it cannot handle this case correctly
(the count loop is always executed at least once and we would not allocate
any memory for the shader outputs), so add another assert to catch it there.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2018-01-17 00:01:19 +01:00
Grazvydas Ignotas 0ad73031ec st/va: release held locks in error paths
Found with the help of following Coccinelle semantic patch:
// <smpl>
@@
expression E;
@@

  \(pthread_mutex_lock\|mtx_lock\|simple_mtx_lock\)(E)
  ...
(
  \(pthread_mutex_unlock\|mtx_unlock\|simple_mtx_unlock\)(E);
  ...
  return ...;
|
+ maybe need_unlock(E);
  return ...;
)
// </smpl>

Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Cc: mesa-stable@lists.freedesktop.org
2018-01-17 00:39:55 +02:00
Grazvydas Ignotas cce982a70b mesa: remove unneeded semicolons
Trivial. Found by Coccinelle.

Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
2018-01-17 00:39:55 +02:00
Grazvydas Ignotas e3adb1abaf radeon: remove unneeded semicolons
Trivial. Found by Coccinelle.

Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
2018-01-17 00:39:55 +02:00
Grazvydas Ignotas 6129c03cc7 osmesa: don't check SmoothFlag twice
Trivial. Found by Coccinelle.

Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
2018-01-17 00:39:55 +02:00
Samuel Pitoiset 05f73b9672 ac: set no-signed-zeros-fp-math when RADV_DEBUG="unsafemath" is used
This is an optimisation that is recommended by Matt Arsenault,
and used by RadeonSI, but it's not compatible with Vulkan.

Note that AC_FLOAT_MODE_UNSAFE_FP_MATH includes the no signed
zeros flag in LLVM.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-01-16 21:39:57 +01:00
Samuel Pitoiset 4f5318df2c ac: set fast math flags when RADV_DEBUG="unsafemath" is used
When that debug option is not used, we use the default float mode
because the no signed zeros optimisation is not Vulkan compatible.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-01-16 21:39:55 +01:00
Samuel Pitoiset 2091206ad3 ac: import lp_create_builder() from gallivm
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-01-16 21:39:53 +01:00
Samuel Pitoiset ad2b3b2a9c ac: replace llvm.AMDGPU.kilp by llvm.amdgcn.kill with LLVM 6
This also replaces llvm.AMDGPU.kilp by llvm.AMDGPU.kill with
LLVM < 6. Similar to RadeonSI codepath.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-01-16 21:39:51 +01:00
Juan A. Suarez Romero 9b894c88a6 glsl/linker: link-error using the same name in unnamed block and outside
According with OpenGL GLSL 4.20 spec, section 4.3.9, page 57:

   "It is a link-time error if any particular shader interface
    contains:
      - two different blocks, each having no instance name, and each
        having a member of the same name, or
      - a variable outside a block, and a block with no instance name,
        where the variable has the same name as a member in the block."

This means that it is a link error if for example we have a vertex
shader with the following definition.

  "layout(location=0) uniform Data { float a; float b; };"

and a fragment shader with:

  "uniform float a;"

As in both cases we refer to both uniforms as "a", and thus using
glGetUniformLocation() wouldn't know which one we mean.

This fixes KHR-GL*.shaders.uniform_block.common.name_matching.

v2: add fixed tests (Tapani)

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2018-01-16 19:42:35 +01:00
Samuel Thibault 47ac11bcf8 glx: fix non-dri build
glXGetDriverConfig parameters do not provide a context to dynamically
check for the presence of the function, so the dispatcher directly calls
glXGetDriverConfig, but in non-dri builds dri_glx.c didn't provide
glXGetDriverConfig.

This change make it just return NULL in that case.

Fixes: 84f764a759 "glxglvnddispatch: Add missing dispatch for GetDriverConfig
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2018-01-16 16:27:19 +00:00
Indrajit Das 338638a8af st/va: clear pointers for mpeg2 quantiser matrices
This is to fix VA-API issues with GStreamer and MPEG2.
Since gstreamer does not pass quantiser matrices with each frame, invalid
pointers were being passed to the driver. This patch addresses the same.

Signed-off-by: Indrajit Das <indrajit-kumar.das@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2018-01-16 10:51:15 +01:00
Indrajit Das f5277e8492 radeon/vcn: update quantiser matrices only when requested
Only update them when the pointers are valid.

Signed-off-by: Indrajit Das <indrajit-kumar.das@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2018-01-16 10:51:00 +01:00
Indrajit Das 38dee62c9a radeon/uvd: update quantiser matrices only when requested
Only upload them when the pointers are valid.

Signed-off-by: Indrajit Das <indrajit-kumar.das@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2018-01-16 10:50:08 +01:00
Adam Jackson 1cbcd70b64 Revert "docs: Mark GLX_ARB_context_flush_control done"
This reverts commit d547e18184.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104490
Signed-off-by: Adam Jackson <ajax@redhat.com>
2018-01-15 13:48:41 -05:00
Adam Jackson 138f4e3805 Revert "gallium/dri2: Enable {GLX_ARB,EGL_KHR}_context_flush_control"
This reverts commit 0d044351b7.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104490
Signed-off-by: Adam Jackson <ajax@redhat.com>
2018-01-15 13:48:39 -05:00
Adam Jackson f2a5d27ce2 Revert "i965: Enable flush control"
This reverts commit 6ce9006d76.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104490
Signed-off-by: Adam Jackson <ajax@redhat.com>
2018-01-15 13:48:16 -05:00
Samuel Pitoiset 8045f01e2a Revert "ac/shader: gather If TES reads TESSINNER or TESSOUTER"
This can't work for two reasons:
- TESSINNER/TESSOUTER are shader input values, so never translated
to the intrinsic ops
- the shader info pass scans the current stage but we want to know
in TCS, if TES reads the tess factors.

This fixes 6 regressions related to
deqp-vk/tessellation/shader_input_output/tess_level_{inner,outer}_XXX_tes

This reverts commit 5ba1a61648.
2018-01-15 13:47:18 +01:00
Samuel Pitoiset 5842cb0df1 amd/common: fix loading InstanceID for tess on < GFX9
InstanceID is in VGPR2, not 1.

One more failure that CTS didn't catch up...

Reported-by: Alex Smith <asmith@feralinteractive.com>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-01-15 11:59:16 +01:00
Samuel Pitoiset 5ba1a61648 ac/shader: gather If TES reads TESSINNER or TESSOUTER
This shouldn't be scanned in the pipeline.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-01-15 11:51:47 +01:00
Samuel Pitoiset aebde47840 ac: remove ac_shader_variant_info::fs::output_mask
Unused.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-01-15 11:48:42 +01:00