Commit Graph

119398 Commits

Author SHA1 Message Date
Eric Anholt 3ac662e8df turnip: Fix some whitespace around binary operators.
Conforms to mesa style and the rest of turnip.

Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3433>
2020-01-21 19:29:59 +00:00
Eric Anholt 6c10af95c7 radeonsi: Drop PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS.
Now that we don't expose TGSI, we can stop exposing the flag.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3493>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3493>
2020-01-21 19:04:22 +00:00
Eric Anholt 609a67461d r300: Remove a bunch of default handling of pipe caps.
u_screen will return 0 for all of these, which means that this is one
less driver to see in git grep when I'm checking who exposes a cap.
The exception is the texel/gather offsets and stream output
components, which will not be exposed since we don't expose the
corresponding GLSL version.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3493>
2020-01-21 19:04:22 +00:00
Eric Anholt e7e034e1de r600: Remove a bunch of default handling of pipe caps.
u_screen will return 0 for all of these, which means that this is one
less driver to see in git grep when I'm checking who exposes a cap.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3493>
2020-01-21 19:04:22 +00:00
Eric Anholt 3e1dd99adc radeonsi: Remove a bunch of default handling of pipe caps.
u_screen will return 0 for all of these, which means that this is one
less driver to see in git grep when I'm checking who exposes a cap.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3493>
2020-01-21 19:04:22 +00:00
Lionel Landwerlin e618951322 anv: don't report error with other vendor DRM devices
Enumeration should just skip unsupported DRM devices.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 34c8621c3b ("anv: Allow enumerating multiple physical devices")
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2386
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3481>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3481>
2020-01-21 18:36:26 +00:00
Eric Anholt fb6fca0037 freedreno: Stop scattered remapping of SSBOs/images to IBOs.
Just make it be all SSBOs then all storage images.  The remapping table
was there to make it so that the big gap present from gallium's atomic
lowering would get cleaned up, but that's no longer case.  The table has
made it very hard to support Vulkan storage images, so it's time for it to
go.

This does mean that an SSBO/IBO that is only loaded (or size-queried) will
now occupy a slot in the table where it wouldn't before.  This seems like
a minor cost compared to being able to drop this much logic.

With the remapping table gone, SSBO array handling for turnip just falls
out.

Fixes many array cases of
dEQP-VK.binding_model.shader_access.primary_cmd_buf.storage_buffer.*

Reviewed-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Jonathan Marek <jonathan@marek.ca> (turnip)
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3240>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3240>
2020-01-21 10:06:23 -08:00
Eric Anholt 7558b5da13 compiler: Add a note about how num_ssbos works in the program info.
These numbers are always confusing, and it's particularly so for this
field where it has a different meaning in different info structs.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3240>
2020-01-21 10:06:23 -08:00
Eric Anholt d0975bfc4a nir: Drop the ssbo_offset to atomic lowering.
The arguments passed in were:
- prog->info.num_ssbos
- prog->nir->info.num_ssbos
- arbitrary values for standalone compilers

The num_ssbos should match between the prog's info and prog->nir's info
until this lowering happens.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3240>
2020-01-21 10:06:23 -08:00
Eric Anholt d5a3971457 gallium: Pack the atomic counters just above the SSBOs.
We carve out half the SSBO space for atomics, and we were just binding
them way up there.  freedreno was then using a remapping table to map the
sparse buffer index back down, since space in the descriptor array is a
shared resource that may limit parallelism.  That remapping table
generated inside of the ir3 compiler is getting thoroughly in the way of
implementing vulkan descriptor sets.

We will be able to get rid of the freedreno's remapping table, and
hopefully save shared resources on other hardware, by packing the atomics
tightly above the SSBOs (like i965 does).  We already rebind the shader
buffers on program change if either the old or new program has SSBOs or
ABOs, so this doesn't necessarily increase the program state change cost
(the only cost increase I can come up with is if you're using the same
atomic counter without rebinding it across changes of programs with
varying SSBO counts, meaning it would now bounce around index space).

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3240>
2020-01-21 10:06:23 -08:00
Eric Anholt 10dc4ac4c5 mesa: Make atomic lowering put atomics above SSBOs.
Gallium arbitrarily (it seems) put atomics below SSBOs, resulting in a
bunch of extra index management, and surprising shader code when you would
see your SSBOs up at index 16.  It makes a lot more sense to see atomics
converted to SSBOs appear as magic high numbers.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3240>
2020-01-21 10:06:23 -08:00
Eric Anholt 2dc2055157 turnip: Refactor linkage state setup.
As I touch this for descriptor set reworks, I don't want to have to update
it twice.

Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3240>
2020-01-21 10:06:23 -08:00
Timur Kristóf 28eb481bc2 nouveau/nvc0: add extern keyword to nvc0_miptree_vtbl.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
2020-01-21 17:36:36 +01:00
Tapani Pälli 5fede43fe0 anv: initialize clear_color_is_zero_one
Fixes following valgrind warning:

   ==12508== Conditional jump or move depends on uninitialised value(s)
   ==12508==    at 0x2CCD8B79: cmd_buffer_begin_subpass (genX_cmd_buffer.c:4599)
   ==12508==    by 0x2CCDA72B: gen9_CmdBeginRenderPass (genX_cmd_buffer.c:5275)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3487>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3487>
2020-01-21 17:47:30 +02:00
Boris Brezillon 9134f22df2 panfrost/midgard: Print the actual source register for store operations
Store operation use r26/r27 but have a word->reg set to 0 or 1 (base is
r26). Let's take this base offset into account in
print_load_store_instr().

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3482>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3482>
2020-01-21 14:57:12 +00:00
Alyssa Rosenzweig 14b37ebd44 panfrost: Add pandecode entries for ASTC/ETC formats
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3414>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3414>
2020-01-21 08:35:23 -05:00
Icecream95 31bd3b5279 panfrost: Add ASTC texture formats
Acked-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3414>
2020-01-21 08:35:23 -05:00
Icecream95 960fe9daea panfrost: Add ETC1/ETC2 texture formats
Acked-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3414>
2020-01-21 08:35:23 -05:00
Alyssa Rosenzweig 2091d311c9 panfrost: Rework linear<--->tiled conversions
There's a lot going on here (it's a ton of commits squashed together
since otherwise this would be impossible to review...)

1. We have a fast path for linear->tiled for whole (aligned) tiles, but we
have to use a slow path for unaligned accesses. We can get a pretty
major win for partial updates by using this slow path simply on the
borders of the update region, and then hit the fast path for the
tile-aligned interior. This does require some shuffling.

2. Mark the LUTs constant, which allows the compiler to inline them,
which pairs well with loop unrolling (eliminating the memory accesses
and just becoming some immediates.. which are not as immediate on
aarch64 as I'd like..)

3. Add fast path for bpp1/2/8/16. These use the same algorithm and we
have native types for them, so may as well get the fast path.

4. Drop generic path for bpp != 1/2/8/16, since these formats are
generally awful and there's no way to tile them efficienctly and
honestly there's not a good reason too either. Lima doesn't support any
of these formats; Panfrost can make the opinionated choice to make them
linear.

5. Specialize the unaligned routines. They don't have to be fully
generic, they just can't assume alignment. So now they should be nearly
as fast as the aligned versions (which get some extra tricks to be even
faster but the difference might be neglible on some workloads).

6. Specialize also for the size of the tile, to allow 4x4 tiling as well
as 16x16 tiling. This allows compressed textures to be efficiently tiled
with the same routines (so we add support for tiling ASTC/ETC textures
while we're at it)

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Tested-by: Vasily Khoruzhick <anarsoul@gmail.com> #lima on Mali400
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3414>
2020-01-21 08:35:19 -05:00
Alyssa Rosenzweig f2d876b2b2 panfrost,lima: De-Galliumize tiling routines
There's an implicit dependence on Gallium here that will add more
complexity than needed when testing/optimizing out of driver as well as
potentially Vulkanizing. We don't need a full pipe_box, just the x/y/w/h
properties directly.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Tested-by: Vasily Khoruzhick <anarsoul@gmail.com> #lima on Mali400
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3414>
2020-01-21 08:35:16 -05:00
Alyssa Rosenzweig 0ca7ab1c97 panfrost: Compile tiling routines with -O3
These are major hot spots for panfrost and lima; better let the compiler
do its thing even on debug builds.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Tested-by: Vasily Khoruzhick <anarsoul@gmail.com> #lima on Mali400
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3414>
2020-01-21 08:35:01 -05:00
Bas Nieuwenhuizen bd4380c63c radv: Remove syncobj_handle variable in header.
I strongly suspect it was supposed to be a typedef. However, used
nowhere, we should remove it.

Fixes: eaa56eab6d "radv: initial support for shared semaphores (v2)"
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2385
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3479>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3479>
2020-01-21 12:28:00 +00:00
Neil Armstrong dc594c95dd gitlab-ci/lava: add pipeline information in the lava job name
In order to have more informations in the LAVA jobs list, add the
current pipeline URL and commit ref name in the LAVA job name.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2337>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2337>
2020-01-21 11:29:36 +00:00
Jan Zielinski a24b3b228a gallium/gallivm: enable linking lp_bld_printf function with C++ code
To enable linking functions declared in lp_bld_printf.h file with C++,
we need to add appropriate macros to the header.

Reviewed-by: Krzysztof Raszkowski <krzysztof.raszkowski@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3470>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3470>
2020-01-21 11:00:18 +00:00
Danylo Piliaiev 3f9a6011a6 iris: Fix value of out-of-bounds accesses for vertex attributes
Having VERTEX_BUFFER_STATE.BufferSize greater than the size of
a bound vertex buffer allows shader to read uninitialized vertex
attributes from BO, instead of allowing hardware to return zeroes
on out-of-bounds access.

OpenGL spec "6.4 Effects of Accessing Outside Buffer Bounds" says:

"Robust buffer access can be enabled by creating a context with robust access
 enabled through the window system binding APIs. When enabled, any command
 unable to generate a GL error as described above, such as buffer object accesses
 from the active program, will not read or modify memory outside of the data
 store of the buffer object and will not result in GL interruption or termination.
 Out-of-bounds reads may return values from within the buffer object or zero
 values."

Fixes three webgl tests:
 conformance/rendering/out-of-bounds-array-buffers.html
 conformance2/rendering/out-of-bounds-index-buffers-after-copying.html
 conformance2/rendering/element-index-uint.html

See #1996

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3427>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3427>
2020-01-21 09:52:40 +00:00
Vasily Khoruzhick e470116aac ci: Re-enable CI for lima on mali450
Amend fails and skips lists basing on lists from Andreas Baierl,
shard mali400 job across two devices since it takes close to 10min
and rename jobs to lima-mali400-test and lima-mali450-test.

Also don't set MESA_GLES_VERSION_OVERRIDE=3.0 for lima since we don't support
GLES 3.0 and lower DEQP_PARALLEL to 3 for jobs on H3.

Keep mali400 jobs disabled atm since they take too much time to complete
and we also get some unexplicable failures in dEQP-GLES2.functional.default_vertex_attrib.*

Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3163>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3163>
2020-01-21 09:33:57 +00:00
Vasily Khoruzhick 5e5b5348f6 ci: lava: pass CI_NODE_INDEX and CI_NODE_TOTAL to lava jobs
deqp-runner.sh uses it to determine whether we split job across multiple
devices and if we do what's the node index.

With this change we now can set 'parallel: N' in job description if we want
to split the job.

Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3163>
2020-01-21 09:33:57 +00:00
Hyunjun Ko 26d93a7495 turnip: fix invalid VK_ERROR_OUT_OF_POOL_MEMORY
When VK_DESCRIPTOR_TYPE_SAMPLER is provided, it doesn't need to be
counted as a buffer count. Otherwise it leads to mismatch of allocated
buffer size, hitting VK_ERROR_OUT_OF_POOL_MEMORY finally.

Fixes: c39afe68f0

Also fixes amber tests:
./tests/cases/address_modes_float.amber
./tests/cases/address_modes_int.amber
./tests/cases/magfilter_linear.amber
./tests/cases/magfilter_nearest.amber

Reviewed-by: Jonathan Marek <jonathan@marek.ca>
2020-01-21 10:29:16 +01:00
Jan Vesely 87e1f8eca5 clover: Initialize Asm Parsers
Fixes piglits that use ADMGCN inline assembly:
	program@execute@calls
	program@execute@amdgcn-mubuf-negative-vaddr

CC: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
2020-01-21 01:39:08 +00:00
Jason Ekstrand 34c8621c3b anv: Allow enumerating multiple physical devices
Instead of having a single physical device in anv_instance, have a
linked list of them.  What we have now works today because we our GPUs
are build into the CPU and so you're guaranteed to only ever have one of
them.  One day, that will change and we want ANV to be ready.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3461>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3461>
2020-01-20 22:08:52 +00:00
Jason Ekstrand e963e151d8 anv: Re-arrange physical_device_init
This commit simply moves fetching the device info and checking if ANV
supports the device a bit higher up.  This way we fail earlier and it'll
make error checking easier in the next commit.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3461>
2020-01-20 22:08:52 +00:00
Jason Ekstrand 3ecfba388a anv: Drop separate chipset_id fields
This already exists in gen_device_info.  There's no reason to keep
duplicate copies.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3461>
2020-01-20 22:08:52 +00:00
Jason Ekstrand 02044be23f anv: Move the physical device dispatch table to anv_instance
We don't actually have genX versions of any physical device level
commands so we don't need the trampoline versions and we don't need to
have a separate table per physical device.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3461>
2020-01-20 22:08:52 +00:00
Jason Ekstrand 78ff747408 anv: Drop the instance pointer from anv_device
There are very few times when we actually want to fetch the instance
from the anv_device.  We can put up with a bit of pain there in exchange
for strongly discouraging people from doing this in general.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3461>
2020-01-20 22:08:52 +00:00
Jason Ekstrand f0519c9cf9 anv: Stop allocating WSI event fences off the instance
Fixes: 16eb390834 "anv: add VK_EXT_display_control to anv driver [v5]"
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3461>
2020-01-20 22:08:52 +00:00
Jason Ekstrand 1ec84bd208 anv: Take a device in anv_perf_warn
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3461>
2020-01-20 22:08:52 +00:00
Jason Ekstrand cb6ea77045 anv: Take an anv_device in vk_errorf
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3461>
2020-01-20 22:08:52 +00:00
Jason Ekstrand 70e8064e13 anv: Add an anv_physical_device field to anv_device
Having to always pull the physical device from the instance has been
annoying for almost as long as the driver has existed.  It also won't
work in a world where we ever have more than one physical device.  This
commit adds a new field called "physical" to anv_device and switches
every location where we use device->instance->physicalDevice to use the
new field instead.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3461>
2020-01-20 22:08:52 +00:00
Marek Olšák 735a3ba007 radeonsi/gfx10: enable GS fast launch for triangles and strips with NGG culling
Only non-indexed triangle lists and strips are supported. This increases
performance if there is something to cull.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
2020-01-20 16:16:11 -05:00
Marek Olšák c377f45c18 radeonsi/gfx10: rewrite late alloc computation
- Use conservative late alloc when the number of CUs <= 6.
- Move the late alloc GS register to the GS shader state, so that it can be
  tuned for NGG culling.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
2020-01-20 16:16:11 -05:00
Marek Olšák 4e4b2d13f0 ac: add helper ac_build_triangle_strip_indices_to_triangle
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
2020-01-20 16:16:11 -05:00
Marek Olšák 8db00a51f8 radeonsi/gfx10: implement NGG culling for 4x wave32 subgroups
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
2020-01-20 16:16:11 -05:00
Marek Olšák aa2d846604 radeonsi/gfx10: move GE_PC_ALLOC setting to shader states
The value is not changed. I just use a different way to compute it.

The value will vary with NGG culling.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
2020-01-20 16:16:11 -05:00
Marek Olšák 41fef6fc09 radeonsi/gfx10: don't initialize VGPRs not used by NGG passthrough
v2: TES doesn't use the GS PrimitiveID

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
2020-01-20 16:16:11 -05:00
Marek Olšák 943d131e7d radeonsi/gfx10: merge main and pos/param export IF blocks into one if possible
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
2020-01-20 16:16:11 -05:00
Marek Olšák a966729c84 radeonsi/gfx10: export primitives at the beginning of VS/TES
This decreases VGPR usage and will allow us to merge some IF blocks
in shaders.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
2020-01-20 16:16:11 -05:00
Marek Olšák 5a0fcf11f0 radeonsi/gfx10: move s_sendmsg gs_alloc_req to the beginning of shaders
This will allow us to merge some IF blocks in shaders.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
2020-01-20 16:16:11 -05:00
Marek Olšák cf9f8d1ea2 radeonsi/gfx10: correct VS PrimitiveID implementation for NGG
We didn't use the correct LDS pointer, though it probably doesn't matter,
because I think that nothing else is using LDS here.

This commit makes it consistent with all other esgs_ring use.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
2020-01-20 16:16:11 -05:00
Marek Olšák b2326a7549 radeonsi/gfx10: update comments and remove invalid TODOs
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
2020-01-20 16:16:11 -05:00
Marek Olšák 0f45d4dc2b ac: add ac_build_readlane without optimization barrier
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
2020-01-20 16:16:11 -05:00