Commit Graph

111997 Commits

Author SHA1 Message Date
Gert Wollny 30eb1fdc51 gallium/virgl: Add code path for virgl to read driconf
This works only for the drm variant of virgl and not for the vtest
variant.

v2: Rebase, replace the configuration query function by a pointer to
    the configuration data.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com> (v1)
Reviewed-by: Gurchetan Singh <gurchetansingh@chromium.org>
2019-06-20 08:50:38 +02:00
Gert Wollny cf800998af virgl: Add driinfo file and tie it into the build
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Gurchetan Singh <gurchetansingh@chromium.org>
2019-06-20 08:50:37 +02:00
Caio Marcelo de Oliveira Filho 9b0720c436 glspirv: Call pass to lower frexp instructions
These were previously handled by the spirv_to_nir, but that changed to
be an explict pass in 23d30f4099 "spirv,nir: lower
frexp_exp/frexp_sig inside a new NIR pass"

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2019-06-19 22:07:57 -07:00
Caio Marcelo de Oliveira Filho 12131096fa spirv: Restrict use of descriptor intrinsics to Vulkan
In ARB_gl_spirv we'll be able to use variables for uniform buffers, so
don't use the descriptor intrinsics to lower the block access.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2019-06-19 22:07:51 -07:00
Nicolai Hähnle 21dd881416 ac/rtld: report better error messages for LDS overallocation
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
2019-06-19 20:30:32 -04:00
Marek Olšák b64bd5887e ac/rtld: check correct LDS max size
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
2019-06-19 20:30:32 -04:00
Nicolai Hähnle 1ee0f0d315 radeonsi: add s_sethalt to shaders for debugging
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
2019-06-19 20:30:32 -04:00
Nicolai Hähnle 87182200c7 ac/rtld: fix sorting of LDS symbols by alignment
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
2019-06-19 20:30:32 -04:00
Bas Nieuwenhuizen d1c04835ab meson: Allow building radeonsi with just the android platform.
Just as was allowed by autotools.

Fixes: 108d257a16 "meson: build libEGL"
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
2019-06-19 23:42:49 +00:00
Bas Nieuwenhuizen 755c633b8d anv: Fix vulkan build in meson.
Apparently the android part was never ported to meson.

CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
2019-06-19 23:27:46 +00:00
Bas Nieuwenhuizen 4c300bd328 radv: Fix vulkan build in meson.
Apparently the android part was never ported to meson.

CC: <mesa-stable@lists.freedesktop.org>
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2019-06-19 23:27:46 +00:00
Jason Ekstrand ef323d02d8 anv/image: Set different usage flags for shadow surfaces
For the block BLOCK_TEXEL_VIEW_COMPATIBLE case, this didn't matter
because the flags were already more-or-less what we wanted.  However,
for gen7 stencil shadow images, it still had ISL_SURF_USAGE_STENCIL_BIT
so we were getting W-tiled which isn't what we want for the shadow.  By
passing just ISL_SURF_USAGE_TEXTURE_BIT (and CUBE if we care), we now
get something that's actually texturable.

Fixes: f3ea0cf828 "anv: Add stencil texturing support for gen7"
2019-06-19 22:21:46 +00:00
Jason Ekstrand 215f9f83f5 anv: Flush caches in anv_image_copy_to_shadow
Copies to a shadow image happen during a VkCmdPipelineBarrier or at
subpass transitions.  We could potentially be a bit more conservative
but these transitions shouldn't happen often and it's better to have our
bases covered.

Fixes: f3ea0cf828 "anv: Add stencil texturing support for gen7"
2019-06-19 22:21:46 +00:00
Jason Ekstrand 81e51b412e nir: Make nir_constant a vector rather than a matrix
Most places in NIR, we treat matrices like arrays.  The one annoying
exception to this has been nir_constant where a matrix is a first-class
thing.  This commit changes that so a matrix nir_constant is the same as
an array nir_constant.  This makes matrix nir_constants a tiny bit more
expensive but shrinks all others by 96B.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
2019-06-19 21:05:54 +00:00
Jason Ekstrand b019fe8a5b glsl/nir: Fix handling of 64-bit values in uniform storage
Reviewed-by: Karol Herbst <kherbst@redhat.com>
2019-06-19 21:05:54 +00:00
Jason Ekstrand a54e397152 spirv: Only copy needed components for OpSpecConstantOp
Reviewed-by: Karol Herbst <kherbst@redhat.com>
2019-06-19 21:05:54 +00:00
Jason Ekstrand 96bb9c9277 spirv: Use a single path for OpSpecConstantOp of OpVectorShuffle
Now that nir_const_value is a scalar, there's no reason why we need
multiple paths here and it's just extra paths to keep working.  While
we're here, we also add a vtn_fail_if check that component indices are
in-bounds.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
2019-06-19 21:05:54 +00:00
Jason Ekstrand 280e5442e5 spirv: Use vtn_constan_uint() for array lengths and gather components
Reviewed-by: Karol Herbst <kherbst@redhat.com>
2019-06-19 21:05:54 +00:00
Jason Ekstrand aa11c2e75e spirv: Add a vtn_constant_int helper
Reviewed-by: Karol Herbst <kherbst@redhat.com>
2019-06-19 21:05:54 +00:00
Jason Ekstrand 93f4aa9889 glsl/types: Add a real is_integer helper
Reviewed-by: Karol Herbst <kherbst@redhat.com>
2019-06-19 20:28:52 +00:00
Jason Ekstrand f0920e266c glsl/types: Rename is_integer to is_integer_32
It only accepts 32-bit integers so it should have a more descriptive
name.  This patch should not be a functional change.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
2019-06-19 20:28:52 +00:00
Jason Ekstrand 21a7e6d569 glsl/types: Ignore bit sizes in contains_integer()
All of the callers for this function are looking at interpolation
qualifiers and want to make sure they're declared flat.  Any 64-bit
integer inputs need to be flat.  It's also makes the function make more
sense since "integer" is fairly generic.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
2019-06-19 20:28:52 +00:00
Jason Ekstrand 0d1fb380b1 glsl/types: Handle all bit sizes in glsl_type_is_integer
All of the callers of this function really just want to know if the type
is an integer and don't care about bit size.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
2019-06-19 20:28:52 +00:00
Caio Marcelo de Oliveira Filho feb0cdcb52 glsl/nir_opt_access: Update uniforms correctly when only vars change
Even if only variables access flags are changed, the existing NIR
infrastructure expects metadata to be explicitly preserved, so do
that.  Don't care about avoiding preserve to be called twice since the
cost is negligible.

This scenario can be triggered by dead variables, and also by other
intrinsics that read the variables -- but not cause progress to be
made when processing the intrinsics.

Fixes: f2d0e48ddc "glsl/nir: Add optimization pass for access flags"
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2019-06-19 12:50:41 -07:00
Caio Marcelo de Oliveira Filho d7ea433a5f glsl/nir: Fix getting the sampler dim when arrays are involved
Unwrap any array in the variable type so we can get the sampler dim.

This fixes piglit test
spec/arb_arrays_of_arrays/execution/image_store/basic-imageStore-const-uniform-index.shader_test.

Fixes: f2d0e48ddc "glsl/nir: Add optimization pass for access flags"
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2019-06-19 12:50:39 -07:00
Jory Pratt 10e8d46601 meson: Search for execinfo.h
Rather than checking __GLIBC__/__UCLIBC__ macros as a proxy for
execinfo.h presence, just check directly. This allows the build to work
on musl.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
2019-06-19 12:16:18 -07:00
Jory Pratt fd7b7f14d8 util: Heap-allocate 256K zlib buffer
The disk cache code tries to allocate a 256 Kbyte buffer on the stack.
Since musl only gives 80 Kbyte of stack space per thread, this causes a
trap.

See https://wiki.musl-libc.org/functional-differences-from-glibc.html#Thread-stack-size

(In musl-1.1.21 the default stack size has increased to 128K)

[mattst88]: Original author unknown, but I think this is small enough
            that it is not copyrightable.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
2019-06-19 12:16:18 -07:00
Kenneth Graunke 9c19d07b1c anv: Fix wrong printf formatter
%lu is for unsigned long, %zu is for size_t.  Just cast the data.
2019-06-19 11:57:01 -05:00
Kenneth Graunke bbbf7a538c iris: Bail on queries for INTEL_NO_HW=1.
We don't execute any of the commands to record snapshots, so we can't
actually produce a real result.  We do however need to avoid waiting
on a syncpt which will never be signalled.  So, just return 0.
2019-06-19 11:55:43 -05:00
David Riley 11e74daae5 virgl: Support VIRGL_BIND_SHARED
Support a new virgl bind type for shared buffers.

Signed-off-by: David Riley <davidriley@chormium.org>
Reviewed-By: Gert Wollny <gert.wollny@collabora.com>
2019-06-19 07:28:47 -07:00
Lionel Landwerlin bc62673dce anv: write spirv-nir logs back to the application
Using the existing VK_EXT_debug_report extension.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2019-06-19 15:45:52 +03:00
Connor Abbott 53a7649e5d ac/nir: Set speculatable for buffer loads where allowed
This brings the nir path in line with the TGSI path.

Totals from affected shaders:
SGPRS: 2984 -> 2984 (0.00 %)
VGPRS: 2792 -> 2652 (-5.01 %)
Spilled SGPRs: 0 -> 0 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Private memory VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 247380 -> 248072 (0.28 %) bytes
LDS: 0 -> 0 (0.00 %) blocks
Max Waves: 121 -> 132 (9.09 %)
Wait states: 0 -> 0 (0.00 %)

Most of the change came from DiRT: Showdown, and came from sinking SSBO
loads.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2019-06-19 14:08:28 +02:00
Connor Abbott 77be5b2f88 nir: Use reorderable access flag
No changes with radeonsi shader-db.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2019-06-19 14:08:28 +02:00
Connor Abbott a1c737927c nir: Add a helper to determine if an intrinsic can be reordered
This is simple now, but we're going to be adding a few more conditions
to this later.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2019-06-19 14:08:28 +02:00
Connor Abbott 6fc83c253f st/nir: Use gl_nir_opt_access
Nothing uses its results yet, that will come with the following commits.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2019-06-19 14:08:28 +02:00
Connor Abbott f2d0e48ddc glsl/nir: Add optimization pass for access flags
Right now, this just deduces when we can arbitrarily reorder SSBO and
image loads, matching the existing logic in radeonsi's TGSI->LLVM pass.
This approach can't handle some things that nir_opt_copy_prop_vars can,
but it can handle images, and with GCM it lets us hoist reads outside of
loops. We can also pass this information to LLVM which lets it do its
own optimizations on it.

This is GLSL only as I haven't tested it on Vulkan yet, and it would
probably need a few changes to work there.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2019-06-19 14:08:28 +02:00
Connor Abbott c813c5776d nir: Add reorderable memory access enum
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2019-06-19 14:08:28 +02:00
Connor Abbott 75063fbac5 nir/copy_prop_vars: Ignore volatile accesses
The spec explicitly says that volatile writes can't be removed and
volatile reads do not guarantee that the same value will still be around
after the read, as if there were a barrier after each read/write. Just
ignore them.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2019-06-19 14:08:28 +02:00
Connor Abbott 364996d70d glsl/nir: Propagate access qualifiers
We were completely ignoring these before, except for putting them on
variables. While we're here, don't set access qualifiers when converting
to bindless since glsl_to_nir will already have set a more accurate
qualifier that includes any qualifiers on struct members that are
dereferenced.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2019-06-19 14:08:27 +02:00
Connor Abbott 6f20643b47 nir: Allow qualifiers on copy_deref and image instructions
In the next commit, we'll properly handle access qualifiers on struct
members by propagating them to load/store instructions, but these
instructions had no way to specify the qualifier.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2019-06-19 14:08:27 +02:00
Connor Abbott 3bf8981c51 ac,radeonsi: Always mark buffer stores as inaccessiblememonly
inaccessiblememonly means that it doesn't modify memory accesible via
normal LLVM pointers. This lets LLVM's dead store elimination, memcpy
forwarding, etc. ignore functions with this attribute. We don't
represent descriptors as pointers, so this property is always true of
buffer and image stores. There are plans to represent descriptors via
pointers, but this just means that now nothing is inaccessiblememonly,
as LLVM will then understand loads/stores via its usual alias analysis.

Radeonsi was mistakenly only setting it if the driver could prove that
there were no reads, and then it was cargo-culted into ac_llvm_build
and ac_llvm_to_nir. Rip it out of everything.

statistics with nir enabled:

Totals from affected shaders:
SGPRS: 152 -> 152 (0.00 %)
VGPRS: 128 -> 132 (3.12 %)
Spilled SGPRs: 0 -> 0 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Private memory VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 9324 -> 9244 (-0.86 %) bytes
LDS: 2 -> 2 (0.00 %) blocks
Max Waves: 17 -> 17 (0.00 %)
Wait states: 0 -> 0 (0.00 %)

The only difference was a manhattan31 shader.

Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
Acked-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-06-19 14:08:27 +02:00
Eric Engestrom 4db2c1e2fe egl: add missing #include
close() is in <unistd.h>

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2019-06-19 12:05:58 +00:00
Samuel Pitoiset 0a313cc285 radv: disable viewport clamping even if FS doesn't write Z
This fixes new CTS dEQP-VK.pipeline.depth_range_unrestricted.*.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-06-19 11:18:50 +02:00
Samuel Pitoiset e91c1ea06c radv: implement compressed FMASK texture reads with RADV_PERFTEST=tccompatcmask
This allows us to disable the FMASK decompress pass when
transitioning from CB writes to shader reads.

This will likely be improved and enabled by default in the future.

No CTS regressions on GFX8 but a few number of multisample CTS
failures on GFX9 (they look related to the small hint).

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-06-19 10:06:39 +02:00
Samuel Pitoiset a7f75377ab radv: fix FMASK expand with SRGB formats
Found while working on DCC for MSAA.

Fixes: 6b976024a8 ("radv: add support for FMASK expand")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-06-19 07:53:53 +02:00
Tomeu Vizoso 0fcf73bc2d panfrost: Move to use ralloc for some allocations
We have some serious leaks, so plug some and also move to ralloc to
limit the lifetime of some objects to that of their parent.

Lots more such work to do.

For some reason, this fixes:

dEQP-GLES2.functional.lifetime.attach.deleted_output.texture_framebuffer

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-06-19 07:34:15 +02:00
Mathias Fröhlich 5743a36b2b egl: Don't add hardware device if there is no render node v2.
Do not offer a hardware drm backed egl device if no render node
is available. The current implementation will fail on this
egl device. On top it issues a warning that is actually missleading.
There are finally more error paths that can fail on the way to a
hardware backed egl device. Fixing all of them would kind of require
opening the drm device and see if there is a usable driver associated
with the device. The taken approach avoids a full probe and fixes at
least this kind of problem on kvm virtualization hosts I observe here.

Fixes: dbb4457d98 ("egl: add EGL_EXT_device_drm support")
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
2019-06-19 07:17:23 +02:00
Christian Gmeiner 8dd26fa2f0 etnaviv: support GL_ARB_seamless_cubemap_per_texture
Passes spec@amd_seamless_cubemap_per_texture@amd_seamless_cubemap_per_texture

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-By: Guido Günther <agx@sigxcpu.org>
2019-06-19 00:39:50 +02:00
Christian Gmeiner a13efb3cdb etnaviv: update headers from rnndb
Update to etna_viv commit a3bf0da.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2019-06-19 00:39:50 +02:00
Dave Airlie 378ea92bf6 radeonsi: fix undefined shift in macro definition
Pointed out by coverity

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-06-19 08:32:36 +10:00