Indirect draws are implemented with compute jobs patching the
vertex/tiler jobs. Provide helpers to do that.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8700>
We want to define structures containing pan_pool objects in pan_device.h
but it is prevented by the
pan_device.h -> pan_pool.h -> pan_bo.h
^____________________________|
loop.
Break this loop by not including pan_device.h from pan_bo.h.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8700>
If the render target is disabled, the CRC won't be updated, and the
slice state should stay unchanged.
Fixes dEQP-GLES2.functional.fbo.render.shared_colorbuffer.tex2d_rgba_stencil_index8
and dEQP-GLES2.functional.fbo.render.shared_colorbuffer.rbo_rgba4_depth_component16.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9907>
Render targets that have no clear or draws are disabled and thus don't
use the color buffer. Don't reserve space for those.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9907>
Alignments are always 2^n, so store n = log2(alignment). The next commit
will take advantage of the saved space.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9809>
This will allow removing the winsys pointer from buffers.
The amdgpu winsys adds dummy_ws to get radeon_winsys because there can be
no radeon_winsys around (e.g. while amdgpu_winsys is being destroyed), but
we still need some way to call buffer functions.
Reviewed-by: Zoltán Böszörményi <zboszor@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9809>
This will allow removing the winsys pointer from buffers.
Reviewed-by: Zoltán Böszörményi <zboszor@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9809>
radeon_bo_reference will be a new function in radeon_winsys.h.
Reviewed-by: Zoltán Böszörményi <zboszor@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9809>
This will allow removing the winsys pointer from buffers.
Reviewed-by: Zoltán Böszörményi <zboszor@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9809>
It appears that between preprocess & postprocess some descriptor
lowering introduces 8bit types in the shader, so run the lower bit
size again to make sure we don't have any unsupported types in our
shader.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: e06144a818 ("anv: Use 64bit_global_32bit_offset for SSBOs")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4478
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9705>
Inherited from Midgard, it's easier to just do at NIR->BIR time now that
we have a builder that doesn't suck. Impeded certain optimizations.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10065>
The trick is that downcasts are just swizzling out what you don't want,
so things like U32_TO_F16 can be synthesized as V2U16_TO_V2F16 with
src.h00
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10065>
The buffer clear after DCC decompression overwrote user SGPRs that we set
here, leading to invalid image coordinates. Set them after we bind images.
This will actually be fixed by "radeonsi: don't decompress DCC for float
formats in si_compute_copy_image" as well.
Fixes: ad71ef9326 "radeonsi: don't use a constant buffer for the copy_image compute shader"
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4583
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10061>
This bit is only meaningful for EGL, where we in fact derive it from
whether EGL_KHR_mutable_render_buffer is enabled and don't actually look
at the DRI attribute.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10045>
The assertions here clearly never get hit, and if they did it'd mean we
were _trying_ to enable 64-bit Z or something. And checking only that
the accumulation has non-negative size is... curious. Just delete it and
clean up the callers.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10045>
radeonMakeCurrent is the only consumer of _mesa_create_framebuffer(),
and all we're doing here is making a dummy for the context to hang on to
when there is no current drawable. intelMakeCurrent uses
_mesa_get_incomplete_framebuffer() for this instead, which is
equivalent, and which matches the usage elsewhere in the tree.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10045>
The gallium context creation API embeds storage for a whole st_visual
even if the context is to have no config. no_config was being used to
signal this, but we can just as easily check that the color format is
non-NONE.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10045>
The format_feature_flags bitfield is derived from the modifier if
the tiling is set to VK_IMAGE_TILING_DRM_FORMAT_MODIFIER_EXT.
However radv will reset the tiling to either LINEAR or OPTIMAL if
the caller supplied a VkPhysicalDeviceImageDrmFormatModifierInfoEXT
in the chain.
Stop resetting the tiling, so that we can compute the correct feature
flags.
Signed-off-by: Simon Ser <contact@emersion.fr>
Fixes: 6c83e3ea98 ("radv: Add format modifier format queries.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9978>
A RDR2 shader has a undef->texture cast which is eventually optimized out.
Without handling NULL from nir_deref_instr_get_variable(), compiling this
shader will result in a crash.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Fixes: bc438c91d9 ("nir/lower_tex: ignore texture_index if tex_instr has deref src")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10038>
this is a great time for resets since there's never a renderpass active,
so an early reset here may mean avoiding a renderpass split later
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10049>
10% of video mem ends up being way too aggressive and causes constant
stalls
really this is supposed to be a failsafe against ooming in a single batch, so
using 50% here ends up serving that purpose much more effectively
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10006>
As that handles better, and more clear, the case of bindingCount being
zero. For the case of Anvil and Turnip, this avoids allocating a
non-needed binding when bindingCount is zero.
Inspired on radv, that was what it was doing so far.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4526
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Hyunjun Ko <zzoon@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9905>
With zink not being autopicked, fixup the CI to pick the
correct drivers for zink testing, noting that xvfb really
doesn't want zink to be chosen.
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9816>
We don't ever want drisw path picking zink as the driver,
we can revisit this when the penny wrapper work gets further
along.
This selection causes systems with nvidia/intel dual-gpus
to try and pick the intel gpu for rendering in the nvidia
context if there is no nvidia GL driver or accel doesn't work.
This is a partial revert of the original commit.
Fixes: 4a3b42a717 ("drisw: Prefer hardware-layered sw-winsys drivers over pure sw")
Acked-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9816>
Boris Brezillon
Pierre-Eric Pelloux-Prayer
Marek Olšák
Lionel Landwerlin
Alyssa Rosenzweig
Alyssa Rosenzweig
Mike Blumenkrantz
Adam Jackson
Simon Ser
Rhys Perry
Alejandro Piñeiro
Dave Airlie
Bas Nieuwenhuizen
Danylo Piliaiev