Commit Graph

114824 Commits

Author SHA1 Message Date
Alyssa Rosenzweig f38ce6ea8c pan/decode: Validate, but do not print, index buffer
We don't actually care about the *contents* of the index buffer, but we
would rather like to ensure it is present and of the correct size.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-08-22 12:56:04 -07:00
Alyssa Rosenzweig cbbf75424a pan/decode: Validate mali_shader_meta stats
We can infer these stats in many cases from the disassembly, so we
should try to sanity check where we can. We may need to be fuzzy about
analysis, since analysis gives us a bound but we don't mind if it's not
used fully by the shader.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-08-22 12:55:49 -07:00
Alyssa Rosenzweig 9b067d96f7 pan/decode: Disassemble before printing shader descriptor
This allows the shader descriptor to access the disassembled stats.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-08-22 12:55:27 -07:00
Alyssa Rosenzweig 5f9a1c74ae pan/decode: Promote <no shader> to an error
There is no reason this should happen to an in-spec program, as far as I
know.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-08-22 12:55:00 -07:00
Alyssa Rosenzweig d7473e2e01 pan/decode: Fix uniform printing
Lazypasting from UBOs.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-08-22 12:54:35 -07:00
Alyssa Rosenzweig 139708bbab pan/decode: Validate blend shaders don't access I/O
We could do better by forcing the checks to *equal* zero (right now, an
indeterminate answer will pass the checks), but this is a start to guard
against some egregious cases.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-08-22 12:54:16 -07:00
Alyssa Rosenzweig ded9a68d8f pan/decode: Validate and simplify FRAGMENT payloads
There are a number of conditions we need to test for to statically check
for TILE_RANGE_FAULTs, but once these checks are in order, we can print
as-is.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-08-22 12:53:44 -07:00
Alyssa Rosenzweig f06e8f7fe9 pan/decode: Validate MFBD tags
These tags need to match up with what's actually described by the MFBD,
so check this. Once this is checked, since the type and contents of the
FBD are obvious from printing above, there's no need to explicitly mark
off the framebuffer line.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-08-22 12:53:10 -07:00
Alyssa Rosenzweig 0c313419a0 pan/decode: Eliminate non-FBD dumped case
We don't need *more* cases to deal with.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-08-22 12:52:52 -07:00
Alyssa Rosenzweig 6ec33b4f34 pan/decode: Removing uniform buffer framing
We can do single line prints:

   ubuf_0[192] = memory_161f5000 + 896;

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-08-22 12:52:37 -07:00
Alyssa Rosenzweig a68fe4baec pan/decode: Remove mali_attr(_meta) framing
It doesn't give any real added value.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-08-22 12:52:18 -07:00
Alyssa Rosenzweig f162adc32b pan/midgard: Disassemble integer constants in hex
It's usually easier to parse mentally.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-08-22 12:51:55 -07:00
Alyssa Rosenzweig b89cb0dba6 pan/midgard: Explain ffma
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-08-22 12:51:39 -07:00
Alyssa Rosenzweig 19d58a299b pan/midgard: Analyze simple loads/store
For shaders using exclusively direct attribute/varyings, we can work
this out statically. For shaders with indirect access, we just set an
upper bound of 16 (the max attributes/varyings we support) and the
actual count will be reported regardless.

We proceed similarly for textures/samplers, as well as for UBOs. While
UBOs can be *indexed* indirectly, the *UBO itself* -- which is what we
count in the shader descriptor (rather than the UBO descriptors) -- is
statically determinable.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-08-22 12:51:21 -07:00
Alyssa Rosenzweig a89e368c7f pan/midgard: Compute work_count via writes
This is exact.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-08-22 12:50:57 -07:00
Alyssa Rosenzweig b9fb63859e pan/midgard: Sketch static analysis to uniform count
This one is a little tricky, but the idea is that:

   r16-r23 are always uniforms

   r8-r15 are sometimes work, sometimes uniforms...
      ...but as work, they are always written before use
      ...and as uniforms, they are never written before use

So we use that heuristic to determine the count to feed the machine.
We'll record work register use in the next commit.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-08-22 12:50:40 -07:00
Alyssa Rosenzweig 58fc260312 pan/decode: Hoist shader-db stats to shared decode
We'll want all this information to validate the shader descriptor.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-08-22 12:50:14 -07:00
Alyssa Rosenzweig a8f86fcb51 nir: Remove nir_const_load_to_arr
There are no remaining users in-tree.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
2019-08-22 12:24:13 -07:00
Alyssa Rosenzweig 3c01a6928a pan/midgard,bifrost: Expand nir_const_load_to_arr
Panfrost is the only user of the macro; we are better off expanding than
having random stuff in nir.h.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
2019-08-22 12:24:13 -07:00
Adam Jackson a7a9d958bc glx: Make __glXGetDrawableAttribute return true sometimes
Right now it always returns zero, but as of:

    commit a48a6b8a40
    Author: Adam Jackson <ajax@redhat.com>
    Date:   Tue Nov 14 15:13:05 2017 -0500

        glx: Prepare driFetchDrawable for no-config contexts

We were hoping it would return true if the drawable could actually be
looked up. It wasn't, so that didn't go very well. With the most recent
update to <GL/glxext.h> glXQueryGLXPbufferSGIX (correctly) returns void,
so there's no longer anything else besides driFetchDrawable that depends
on the return value from __glXGetDrawableAttribute.

Acked-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2019-08-22 13:29:06 -04:00
Adam Jackson 3dd299c3d5 glx: Sync <GL/glxext.h> with Khronos
Minor fixups required to keep the prototypes matching and to remove
mention of retired enums.

Acked-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2019-08-22 13:29:04 -04:00
Adam Jackson 5ebd333c6c glx: Whitespace cleanups
Acked-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2019-08-22 13:28:39 -04:00
Eric Engestrom 6db1dfe347 swr: use LLVM version string instead of re-computing it
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-08-22 16:08:09 +01:00
Eric Engestrom 7f5ef97a07 llvmpipe: use LLVM version string instead of re-computing it
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-08-22 16:08:09 +01:00
Eric Engestrom 3ea83f4c9b scons: define MESA_LLVM_VERSION_STRING like the other build systems do
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-08-22 16:08:09 +01:00
Bas Nieuwenhuizen c037fe5ad1 radv: Disable NGG for geometry shaders.
A bunch of remaining issues including some that affect users.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111248
Fixes: ee21bd7440 "radv/gfx10: implement NGG support (VS only)"
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2019-08-22 12:47:32 +02:00
Lionel Landwerlin 5833f43305 util/timespec: use unsigned 64 bit integers for nsec values
We added this utility for vulkan where all timeouts are given as
uint64_t values. We can switch from signed to unsigned as this is the
only user and if we ever deal with signed integers somewhere else
we'll have to be careful to use the corresponding
timespec_(add|sub)_msec and always pass absolute values.

v2: Forgot to drop the test calling add_nsec() with a negative number

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reported-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Fixes: d2d70c3bb5 ("util: add a timespec helper")
Acked-by: Daniel Stone <daniels@collabora.com>
2019-08-22 09:35:57 +02:00
Tapani Pälli 728ebcdec2 iris/android: fix build and link with libmesa_intel_perf
Fixes: 0fd4359733 "iris/perf: implement routines to return counter info"
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2019-08-22 10:01:14 +03:00
Samuel Pitoiset 2d9f401a83 ac: fix exclusive scans on GFX8-GFX9
This fixes a regression introduced with scan&reduce operations
on GFX10. Note that some subgroups CTS still fail on GFX10 but
I assume it's a different issue.

This fixes dEQP-VK.subgroups.arithmetic.*.subgroupexclusive*.

Fixes: 227c29a80d "amd/common/gfx10: implement scan & reduce operations"
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-08-22 08:43:15 +02:00
Tapani Pälli ce8fd042a5 util: fix os_create_anonymous_file on android
Commit fixes current crashes with Vulkan applications on Android.

Fixes: c0376a1234 "util: add anon_file.h for all memfd/temp file usage"
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
2019-08-22 08:27:43 +03:00
Lionel Landwerlin ac5bda374a i965: honor scanout requirement from DRI
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2019-08-21 23:52:07 +00:00
Kenneth Graunke bc844d92ce gallium/noop: Implement resource_get_param
v2: Pass through to oscreen rather than faking it (review from Marek).

Fixes: 0346b70083 ("gallium/screen: Add pipe_screen::resource_get_param")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-08-21 22:18:22 +00:00
Kenneth Graunke f02d1a0b75 gallium/rbug: Wrap resource_get_param if available
Fixes: 0346b70083 ("gallium/screen: Add pipe_screen::resource_get_param")
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-08-21 22:18:22 +00:00
Kenneth Graunke c43a44791b gallium/trace: Wrap resource_get_param if available
Fixes: 0346b70083 ("gallium/screen: Add pipe_screen::resource_get_param")
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-08-21 22:18:22 +00:00
Kenneth Graunke 0e6b573ae5 gallium/ddebug: Wrap resource_get_param if available
Fixes: 0346b70083 ("gallium/screen: Add pipe_screen::resource_get_param")
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-08-21 22:18:22 +00:00
Jose Maria Casanova Crespo 74a7e3ed3b mesa: recover target_check before get_current_tex_objects
At compressed_tex_sub_image we only can obtain the tex_object after
compressed_subtexture_target_check is validated for TEX_MODE_CURRENT.
So if the target is wrong the error is raised to the user.

This completes the fix for the regression introduced on "mesa: refactor
compressed_tex_sub_image function" of the pending failing tests:

dEQP-GLES3.functional.negative_api.texture.compressedtexsubimage3d
dEQP-GLES31.functional.debug.negative_coverage.get_error.texture.compressedtexsubimage3d

v2: Fix warning that texObj might be used uninitialized (Gert Wollny)

Fixes: 7df233d68d ("mesa: refactor compressed_tex_sub_image function")
Reviewed-By: Gert Wollny <gert.wollny@collabora.com>
2019-08-21 21:26:48 +01:00
Kevin Strasser 5baff5dd3c gallium: Add buffer and configs handling or fp16 formats
Expose configs when allow_fp16_configs has been enabled and
DRI_LOADER_CAP_FP16 is set in the loader.

Also, make kms_swrast_dri respect format bpp, to allow for allocating
buffers wider than 32 bpp.

Make fp16 opt-in for gallium.

Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2019-08-21 18:36:57 +00:00
Kevin Strasser f4703f1c10 i965: Add handling for fp16 configs
Expose configs when allow_fp16_configs has been enabled and
DRI_LOADER_CAP_FP16 is set in the loader.

Also, define a new dri configuration option so users can disable exposure of
fp16 formats. Make fp16 opt-in for i965.

Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2019-08-21 18:36:57 +00:00
Kevin Strasser 4861d2a395 gbm: Add buffer handling and visuals for fp16 formats
Define and set a new loader cap DRI_LOADER_CAP_FP16, indicating that gbm can
handle fp16 formats.

Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2019-08-21 18:36:57 +00:00
Kevin Strasser a427c20080 dri: Add fp16 formats
Add dri formats for RGBA ordered 64 bpp IEEE 754 half precision floating
point. Leverage existing offscreen render support for
MESA_FORMAT_RGBA_FLOAT16 and MESA_FORMAT_RGBX_FLOAT16.

Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2019-08-21 18:36:57 +00:00
Kevin Strasser 482ed4347d egl: Handle dri configs with floating point pixel data
In the case that __DRI_ATTRIB_FLOAT_BIT is set in the dri config, set
EGL_COLOR_COMPONENT_TYPE_FLOAT_EXT in the egl config. Add a field to the
platform driver visual to indicate if it has components that are in floating
point form.

Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2019-08-21 18:36:57 +00:00
Kevin Strasser 86d31c2c12 dri: Handle configs with floating point pixel data
In order to handle pixel formats that consist of floating point data, enable
floatMode field in the dri config, and set __DRI_ATTRIB_FLOAT_BIT in the
render type attribute.

Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2019-08-21 18:36:57 +00:00
Kevin Strasser d4a9010338 glx: Add fields for color shifts
glx doesn't read the masks from the dri config directly, but for consistency
add shifts to the glxconfig.

Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2019-08-21 18:36:57 +00:00
Kevin Strasser 7b4ed2b513 egl: Convert configs to use shifts and sizes instead of masks
Change dri2_add_config to take arrays of shifts and sizes, and compare with
those set in the dri config. Convert all platform driver masks
to shifts and sizes.

In order to handle older drivers, where shift attributes aren't available,
we fall back to the mask attributes and compute the shifts with ffs.

Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2019-08-21 18:36:57 +00:00
Kevin Strasser 3562f48c9d util: move bitcount to bitscan.h
bitcount is free from the pipe header dependencies that make u_math.h hard
to include by non-gallium specific code, so move it to bitscan.h. bitscan.h
is included by u_math.h so existing references will continue working.

Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2019-08-21 18:36:57 +00:00
Kevin Strasser 5a747306ce dri: Add config attributes for color channel shift
The existing mask attributes can only support up to 32 bpp. Introduce
per-channel SHIFT attributes that indicate how many bits, from lsb towards
msb, the bit field is offset. A shift of -1 will indicate that there is no
bit field set for the channel.

As old loaders will still be looking for masks, we set the masks to 0 for
any formats wider than 32 bpp.

Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2019-08-21 18:36:57 +00:00
Kevin Strasser 9328e7c04c gallium: Use consistent approach for config format filtering
rgb10 uses an 'if(allowed) continue' approach, do the same for rgba_ordering.

Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2019-08-21 18:36:57 +00:00
Kevin Strasser 4fb71604b7 i965: Add helper function for allowed config formats
The driver checks dri config options and loader caps to filter out certain
formats during config creation. Fold 4 call sites under a single helper
function.

Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2019-08-21 18:36:57 +00:00
Kevin Strasser d07a56dbc0 drm-uapi: Update headers for fp16 formats
From drm-next commit 88ab9c76d191ad8645b483f31e2b394b0f3e280e

Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2019-08-21 18:36:57 +00:00
Andres Rodriguez bd960390bb radv: add RADV_DEBUG=allentrypoints
This debug option allows vkGet[Instance/Device]ProcAddr() to succeed
even if the extension associated with the requested entrypoint was not
enabled.

This has come in handy in a few instances when debugging VR
applications, so I thought it would be good to have a cleaned up version
upstreamed.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-08-21 17:47:35 +00:00