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96454 Commits

Author SHA1 Message Date
Samuel Pitoiset 807f2d4f33 radv: introduce the concept of meta save flags 
This will allow us to save/restore the different states on-demand
based on the meta operation. For now, this saves/restores all
states. Compute will follow once the graphics part is done.

The main idea is to merge all save/restore helpers.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2017-10-06 09:49:05 +02:00
Samuel Pitoiset a3a497c921 radv: remove unused RADV_META_VERTEX_BINDING_COUNT 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2017-10-06 09:49:05 +02:00
Samuel Pitoiset b269ed3d94 radv: select the pipeline outside of the loop when decompressing htile 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2017-10-06 09:49:05 +02:00
Samuel Pitoiset 507df35939 radv: add radv_htile_enabled() helper 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2017-10-06 09:49:05 +02:00
Tapani Pälli 0351638284 i965: pass wanted format to intel_miptree_create_for_dri_image 
Change b3a44ae7a4 caused regressions on Android where DRI and renderbuffer
can disagree on the format being used. This patch removes the colorspace
parameter and instead we pass renderbuffer format. For non-winsys images we
still do srgb/linear modification in same manner as change b3a44ae7a4 wanted
but take format from renderbuffer instead of DRI image.

This patch fixes regressions seen with following test sets:

   dEQP-EGL.functional.color_clears*
   dEQP-EGL.functional.render*

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102999
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
 2017-10-06 08:06:13 +03:00
Marek Olšák c4d1a199f8 radeonsi: add a drirc workaround for HTILE corruption in ARK: Survival Evolved 
v2: use DB_META | PS_PARTIAL_FLUSH

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102955
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> (v1)
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> (v1)
 2017-10-06 02:56:11 +02:00
Marek Olšák 15d918e46f radeonsi: inline struct si_sampler_views 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2017-10-06 02:56:11 +02:00
Marek Olšák 23cdde5138 radeonsi: rename si_textures_info -> si_samplers, si_images_info -> si_images 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2017-10-06 02:56:11 +02:00
Marek Olšák 3dfb375446 radeonsi: fold needs_*_decompress_mask update into si_set_sampler_view 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2017-10-06 02:56:11 +02:00
Marek Olšák bd5509d0a8 radeonsi: simplify a loop in si_update_fb_dirtiness_after_rendering 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2017-10-06 02:56:11 +02:00
Marek Olšák bcd3e761a3 ac: properly document a buffer.store LLVM workaround 
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2017-10-06 02:56:11 +02:00
Marek Olšák cceb916456 radeonsi: use f32_0 and f32_1 
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2017-10-06 02:56:11 +02:00
Marek Olšák 1516059ab1 radeonsi: fold *gallivm 
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2017-10-06 02:56:11 +02:00
Marek Olšák e1b83c67da radeonsi: lp_type::length is always 1 
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2017-10-06 02:56:11 +02:00
Marek Olšák 906ee3a3ba radeonsi: don't use bld.elem_type 
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2017-10-06 02:56:11 +02:00
Marek Olšák 723a23905f radeonsi: don't use lp_build_const_* 
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2017-10-06 02:56:11 +02:00
Marek Olšák b4600b4740 radeonsi: use ctx->ac.context and ctx->types 
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2017-10-06 02:56:11 +02:00
Marek Olšák d0751f6c1f radeonsi: use ctx->ac.builder 
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2017-10-06 02:56:11 +02:00
Marek Olšák 82dc72c8bd radeonsi: use ctx->i/f32 types more 
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2017-10-06 02:56:11 +02:00
Marek Olšák dcbd3d470c radeonsi: use i32_0 and i32_1 more 
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2017-10-06 02:56:11 +02:00
Marek Olšák bacdf5a928 radeonsi: use bitcast in a few places 
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2017-10-06 02:56:11 +02:00
Marek Olšák ad7305aa96 radeonsi: use ac helpers for bitcasts 
Reviewed-by: Nicolai Hähnle <nicolai.haehnle at amd.com>
 2017-10-06 02:56:11 +02:00
Marek Olšák 9a88580a4b glsl_to_tgsi: skip UARL for 1D registers if the driver doesn't need it 
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2017-10-06 02:56:11 +02:00
Marek Olšák 1bf1bfc12a glsl_to_tgsi: handle reladdr as TEMP in rename_temp_registers and dead_code 
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2017-10-06 02:56:11 +02:00
Marek Olšák 8602c6a326 glsl_to_tgsi: each reladdr object should have only one parent 
required by rename_temp_registers.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2017-10-06 02:56:11 +02:00
Marek Olšák 985338e2cb glsl_to_tgsi: fix instruction order for bindless textures 
We emitted instructions loading the bindless handle after the memory
instruction.

Cc: 17.2 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2017-10-06 02:56:11 +02:00
Marek Olšák bd1837471a glsl_to_tgsi: enable copy propagation for tessellation shaders 
just don't propagate output reads

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2017-10-06 02:56:11 +02:00
Marek Olšák dbe16d7537 radeonsi: implement PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS 
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2017-10-06 02:56:11 +02:00
Marek Olšák 44993bd26f radeonsi: use si_get_indirect_index for TEMP indexing 
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2017-10-06 02:56:11 +02:00
Marek Olšák e986a16c16 radeonsi: use si_get_indirect_index for CONST indexing 
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2017-10-06 02:56:11 +02:00
Marek Olšák 212c612a63 tgsi/ureg: allow any register file in address operands 
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2017-10-06 02:56:11 +02:00
Marek Olšák 41b85158ab gallium: add PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS 
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2017-10-06 02:56:11 +02:00
Marek Olšák cb686a340f tgsi/scan: scan address operands (v2) 
v2: set swizzled usage mask

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2017-10-06 02:56:11 +02:00
Marek Olšák 37714c6df2 tgsi/scan: set correct usage mask for tex offsets in scan_src_operand 
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2017-10-06 02:56:11 +02:00
Marek Olšák 5cc779197c tgsi/scan: take advantage of already swizzled usage mask in scan_src_operand 
It has always been a usage mask *after* swizzling.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2017-10-06 02:56:11 +02:00
Marek Olšák ea85b76519 tgsi/scan: set non-valid src_index for tex offsets in scan_src_operand 
tex offsets are not "Src" operands.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2017-10-06 02:56:11 +02:00
Marek Olšák be3ab867bd tgsi: implement tgsi_util_get_inst_usage_mask properly 
All opcodes are handled.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2017-10-06 02:56:11 +02:00
Marek Olšák bb8abc10bf tgsi: add docs for some existing pack opcodes 
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
 2017-10-06 02:56:11 +02:00
Bas Nieuwenhuizen 4ffb9890ef radv: Enable VK_KHR_maintenance2 extension. 
Reviewed-by: Dave Airlie <airlied@redhat.com>
 2017-10-06 01:41:29 +02:00
Bas Nieuwenhuizen 0c90ca7d37 radv: Make tess winding order a bit more intuitive. 
Reviewed-by: Dave Airlie <airlied@redhat.com>
 2017-10-06 01:41:29 +02:00
Bas Nieuwenhuizen c62afd094d radv: Allow setting the domain origin in tess. 
Reviewed-by: Dave Airlie <airlied@redhat.com>
 2017-10-06 01:41:29 +02:00
Bas Nieuwenhuizen ca21634632 radv: Disable usage checks in metadata for images with extended usage data. 
The app can extend the usage, so knowing that the usage is limitied
does not help us here.

Reviewed-by: Dave Airlie <airlied@redhat.com>
 2017-10-06 01:41:29 +02:00
Bas Nieuwenhuizen f800d91019 radv: Implement querying the point clipping behavior. 
Reviewed-by: Dave Airlie <airlied@redhat.com>
 2017-10-06 01:41:29 +02:00
Daniel Stone bbe2082e7d broadcom: Fix out-of-tree build include path 
Reviewed-by: Eric Anholt <eric@anholt.net>
Fixes: 5b102160ae ("broadcom/genxml: Introduce a V3D packet/struct decoder.")
 2017-10-05 15:03:11 -07:00
Bas Nieuwenhuizen 908a25ecb0 meson: generate builddir/src/amd/vulkan/dev_icd.json 
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
 2017-10-05 23:46:21 +02:00
Kenneth Graunke 18bdf73556 mesa: Use a 565 format for GL_RGB and GL_UNSIGNED_SHORT_5_6_5 textures. 
Found while trying to optimize an application.

Not observed to help performance on i965, but should at least reduce
the memory usage of such textures a bit.

Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Eero Tamminen <eero.t.tamminen@intel.com>
 2017-10-05 14:30:47 -07:00
Jason Ekstrand 7463d50580 intel/compiler: Don't propagate cmod into integer multiplies 
No shader-db change on Sky Lake.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Cc: mesa-stable@lists.freedesktop.org
 2017-10-05 11:54:49 -07:00
Jason Ekstrand b91ecee04a intel/compiler: Don't cmod propagate into a saturated operation 
Shader-db results on Sky Lake:

    total instructions in shared programs: 12954445 -> 12955125 (0.01%)
    instructions in affected programs: 141862 -> 142542 (0.48%)
    helped: 0
    HURT: 626

Reviewed-by: Matt Turner <mattst88@gmail.com>
Cc: mesa-stable@lists.freedesktop.org
 2017-10-05 11:54:49 -07:00
Derek Foreman 17d78ece36 broadcom/vc4: Don't advertise tiled dmabuf modifiers if we can't use them 
If the DRM_VC4_GET_TILING ioctl isn't present then we can't tell
if a dmabuf bo is tiled or linear, so will always assume it's
linear.

By not advertising tiled formats in this situation we ensure the
assumption is correct.

This fixes a bug where most attempts to render a gl wayland client
under weston will result in a client side abort.

Signed-off-by: Derek Foreman <derekf@osg.samsung.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Acked-by: Daniel Stone <daniels@collabora.com> (on irc)
 2017-10-05 11:26:14 -07:00
Adam Jackson b174a1ae72 egl: Simplify the "driver" interface 
"Driver" isn't a great word for what this layer is, it's effectively a
build-time choice about what OS you're targeting. Despite that both of
the extant backends totally ignore the display argument, the old code
would only set up the backend relative to a display.

That causes problems! One problem is it means eglGetProcAddress can
generate X or Wayland protocol when it tries to connect to a default
display so it can call into the backend, which is, you know, completely
bonkers. Any other EGL API that doesn't reference a display, like
EGL_EXT_device_query, would have the same issue.

Fortunately this is a problem that can be solved with the delete key.

Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Adam Jackson <ajax@redhat.com>
 2017-10-05 13:43:34 -04:00