This improves performance in torcs by 6%.
The idea is to skip saving and restoring vertex attribs and bindings that
have never been changed.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10994>
this hook usually requires mapping a resource, which will trigger a
trace dump internally, which requires locking the output mutex, so
finish the trace dump before calling it
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11052>
A simple post-RA optimization which takes advantage of the
s_cbranch_vccz and s_cbranch_vccnz instructions.
It works on the following pattern:
vcc = v_cmp ...
scc = s_and vcc, exec
p_cbranch scc
The result looks like this:
vcc = v_cmp ...
p_cbranch vcc
Fossil DB results on Sienna Cichlid:
Totals from 4814 (3.21% of 149839) affected shaders:
CodeSize: 15371176 -> 15345964 (-0.16%)
Instrs: 3028557 -> 3022254 (-0.21%)
Latency: 21872753 -> 21823476 (-0.23%); split: -0.23%, +0.00%
InvThroughput: 4470282 -> 4468691 (-0.04%); split: -0.04%, +0.00%
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7779>
This commit adds the skeleton of a new ACO post-RA optimizer,
which is intended to be a simple pass called after RA, and
is meant to do code changes which can only be done
after RA.
It is currently empty, the actual optimizations will be added
in their own commits. It only has a DCE pass, which deletes
some dead code generated by the spiller.
Fossil DB results on Sienna Cichlid:
Totals from 375 (0.25% of 149839) affected shaders:
CodeSize: 2933056 -> 2907192 (-0.88%)
Instrs: 534154 -> 530706 (-0.65%)
Latency: 12088064 -> 12084907 (-0.03%); split: -0.03%, +0.00%
InvThroughput: 4433454 -> 4432421 (-0.02%); split: -0.02%, +0.00%
Copies: 81649 -> 78203 (-4.22%)
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7779>
This reverts commit eef5409df4.
I suspect this has caused a lot of the CI instability today -- some flakes
were already added, but the a630-traces job is still flaking. Revert
until a fix makes it stable.
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11024>
Desktop and ES expect a different error code here when dealing with
generic compressed format tokens. This fixes failures with upcoming
new tests for compressed texture related API calls.
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11009>
Technically, this is correct, and I think it's the right long-term
solution. However, Iris has code that undoes the damage caused by
nir_lower_passthrough_edgeflags (see iris_fix_edge_flags in
iris_program.c), so it should be safe to do the lowering here.
I'm not marking this as closing mesa#4838 because I think we should move
the Iris code up to here, make a different version of the NIR pass, or
something different... to properly fix this problem. In the mean time,
this gets a bunch of tests to stop crashing. :)
Fixes: a76ec17f12 ("mesa/st: Fix iris regression with clip distances.")
Acked-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11013>
The CTS expects that some paths transfer SNORM data exactly, but the HW
will clamp 0x80 values to 0x81 in the process. We can treat snorm as
unorm, though, and get working compression without the clamping happening.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10735>
Now that we need FALLTHROUGH macros we weren't saving much by falling
through, and things were weirdly ordered anyway with depth intermixed with
color formats and the default case tucked in the middle of the switch
statement. Replace with pretty obvious ordering of normal color, planar
color, depth, then default.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10735>
Configure a panfrost performance structure with tables of categories and
counters for the current product id. An array for storing counter values
read from the GPU is also managed by this structure. A generic read
function can be used to retrieve the value of a counter from the conter
values array.
v2: Generate tables instead of calling register functions.
v3: Simplify counter read function and `pan_gen_perf.py` write method.
v4: Accumulate counter values from all cores.
v5: Wrap `STATIC_ASSERT`s within unused functions.
Signed-off-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10844>
Sometimes the reticle is missing. Skip it for now to keep the number of
pipeline failures due to flakes low.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11033>
When we emit constants, we don't know what type they'll be used as, so
we just emit them as uint, and then bitcast them to whatever we need.
But this isn't a good idea for ConstOffset, which needs to actually be a
const value, and not a const value bitcasted. So we sadly have to
open-code the const emitting here to avoid the problem.
Fixes: e963d35efe1 ("zink: use ConstOffset for nir_tex_src_offset")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4831
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11032>
This one is not implemented in the common dispatch handler in terms
of its KHR_get_memory_requirements2 version, so the driver needs
to implement it.
Fixes: d87afc1acc ('v3dv: implement VK_KHR_get_memory_requirements2')
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11038>
In the last round of IRC link updates, #freedesktop hadn't moved yet. Now
it has, so let's update the reference.
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Clayton Craft <clayton@craftyguy.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10975>
I didn't initially update this one because craftguy hadn't moved to OFTC
when I wrote the last patch. But now he has, so let's also update this
reference.
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Clayton Craft <clayton@craftyguy.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10975>
This reverts commit 8e470457de.
Drop that jobs, as it's sometimes causing a gitlab-ci.yml parse error
that isn't readily reproducible:
Found errors in your .gitlab-ci.yml:
'a630-profile-traces' job needs 'arm_test' job but it was not added to the pipeline
'a630-profile-traces' job needs 'meson-arm64' job but it was not added to the pipeline
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11030>
This improves performance by 23% with radeonsi and Ryzen 3900X running
the game torcs.
All vertex buffers must be user buffers to get this.
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10992>
barriers just trigger a full flush, which is unnecessary if it's:
* the first cmd in a cmdbuf, as the previous cmdbuf will have already
flushed and so this is flushing nothing
* the last cmd in a cmdbuf, as there will be a flush immediately after
returning from this function
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10762>