Commit Graph

142760 Commits

Author SHA1 Message Date
Alyssa Rosenzweig 84e2e5f23c pan/bi: Clean up useless casts
Left over from removing inheritance with sed instead of coccinelle.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11936>
2021-07-18 01:49:26 +00:00
Alyssa Rosenzweig 1fcea30295 pan/bi: Copy block bi_block
Gets rid of the silly inheritance everywhere, which has caused _far_
more problems in practice than it has fixed. It was an idea I tried
before the pandemic. It didn't work. I'm finally cleaning it up.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11936>
2021-07-18 01:49:26 +00:00
Alyssa Rosenzweig a372368e22 pan/bi: Copy back bi_foreach_successor
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11936>
2021-07-18 01:49:26 +00:00
Alyssa Rosenzweig 8bee48a635 pan/bi: Copy back add_successor
Trying to get back independent block types.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11936>
2021-07-18 01:49:26 +00:00
Alyssa Rosenzweig a667e1bb6d pan/bi: Copy liveness routines back
We'll diverge shortly.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11936>
2021-07-18 01:49:26 +00:00
Timur Kristóf 55d57b828f aco: Fix how p_elect interacts with optimizations.
Since p_elect doesn't have any operands, ACO's value numbering and/or
the pre-RA optimizer could currently recognize two p_elect instructions
in two different blocks as the same.

This patch adds exec as an operand to p_elect in order to achieve
correct behavior.

Fixes: e66f54e5c8
Closes: #5080
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11943>
2021-07-18 00:48:06 +02:00
Timothy Arceri 749251391d glsl: replace some C++ code with C
This replaces some new/delete uses with malloc/free.

This is more consistent with most of the other glsl IR code but
more importantly it allows the game "Battle Block Theater" to
start working on some mesa drivers. The game overrides new and
ends up throwing an assert and crashing when it sees this
function calling new [0].

Note: The game still crashes with radeonsi due to similar conflicts
with LLVM.

CC: mesa-stable

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11907>
2021-07-17 10:07:37 +00:00
Marek Olšák ed57666a5c mesa: fix incorrect comment in draw_gallium_multimode
Fixes: 4566383ae4 ("gallium: move pipe_draw_info::index_bias to pipe_draw_start_count_bias")

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11939>
2021-07-17 02:59:54 +00:00
Marek Olšák 73a03d12e9 mesa: remove unused drawid_offset parameter from DrawGalliumMultiMode
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11939>
2021-07-17 02:59:54 +00:00
Marek Olšák 703279e6da st/mesa: inline st_setup_arrays on MSVC too by adding a wrapper
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11939>
2021-07-17 02:59:54 +00:00
Mike Blumenkrantz 2850db0a9e util/foz: stop crashing on destroy if prepare hasn't been called
Fixes: eca6bb9540 ("util/fossilize_db: add basic fossilize db util to read/write shader caches")

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11931>
2021-07-17 02:35:11 +00:00
Iván Briano d27f7fa1b3 anv: fix feature/property/sizes reported for fragment shading rate
Fixes: 790ff1ceac ("anv: fixup physical device properties of fragment shading rate")

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11897>
2021-07-17 00:46:54 +00:00
Mike Blumenkrantz 8f0385c12c util/tc: make clear calls async
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11864>
2021-07-17 00:28:45 +00:00
Marek Olšák 1abc480b5a radeonsi: document a missing synchronization for bindless textures
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11900>
2021-07-16 23:08:00 +00:00
Yogesh mohan marimuthu 7f9b3a7098 radeonsi: set scratch_state dirty only if ctx->scratch_buffer allocated
if ctx->scratch_buffer is NULL, then no need to update SPI_TMPRING_SIZE
size register.

Signed-off-by: Yogesh mohan marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11900>
2021-07-16 23:08:00 +00:00
Yogesh mohan marimuthu be9ca62247 radeonsi: remove redundant setting scratch_state atom dirty
Whenever scratch buffer is allocated, current spi_tmpring_size and
previous spi_tmpring_size cannot be same and hence scratch_state will be
set dirty as part of "if (spi_tmpring_size != sctx->spi_tmpring_size)".
Removing redundant dirty bit sat while allocating scratch buffer.

Signed-off-by: Yogesh mohan marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11900>
2021-07-16 23:08:00 +00:00
Marek Olšák 86ff5b7ddb radeonsi: don't expose no-attachment MSAA 16x on all 1 RB chips due to issues
Cc: mesa-stable@lists.freedesktop.org

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11900>
2021-07-16 23:08:00 +00:00
Mike Blumenkrantz 59e923e5a1 lavapipe: don't read line stipple info in pipeline creation if stipple is disabled
otherwise these values may be (harmlessly) garbage

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11933>
2021-07-16 22:13:49 +00:00
Eric Anholt 11f9ad9238 gallium/ttn: Add a debug flag for dumping the shaders.
Just like for ntt, it's nice to be able to dump the shader that assertion
failed on you.

Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11915>
2021-07-16 21:55:12 +00:00
Emma Anholt 8c36022e0d nir_to_tgsi: Fix image declarations.
We failed to translate the target type, which virgl needs for translation.
Also the read_only flag is for consts, shader inputs, and uniforms.  The
access flag gives you the readonly qualifier.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11916>
2021-07-16 21:35:31 +00:00
Jason Ekstrand 46cc332025 anv: Stop reference counting semaphores
The only reason we had to refcount semaphores was for the ancient
sync_file semaphores which we used for pre-syncobj kernels.  Now that we
assume syncobj and that code is gone, we don't need reference counting
anymore either.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9777>
2021-07-16 21:12:21 +00:00
Jason Ekstrand d44ea09e61 anv: Drop unused sync_file and BO semaphore code
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9777>
2021-07-16 21:12:21 +00:00
Jason Ekstrand 3b363d5b55 anv: Assume syncobj support
Sync object for i915 support has been in upstream Linux since 4.14 which
is 3.5 years old at this point and, as far as we can tell, it also
exists in all the ChromeOS kernels.  Assuming it allows us to drop some
of our more gnarly synchronization fall-back paths.

At the time of merge, ChromeOS was on the following kernels:

 - kernel 3.18: SKL
 - kernel 4.4: BYT, KBL, APL
 - Kernel 4.14: BDW, GLK

All of the pre-4.14 kernels have had syncobj support back-ported.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9777>
2021-07-16 21:12:21 +00:00
Jason Ekstrand a62973580b intel/eu: Start validating LSC message descriptors
This is certainly not a full validation but it at least gets the
framework in place and validates one hard-to-find restriction.

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11657>
2021-07-16 17:25:48 +00:00
Sagar Ghuge 89b7a40212 intel/compiler: Enable has_iadd3 option on XeHP
shader-db result is inconclusive but doesn't harm to include it for
reference.

Shader-db result on XeHPG:

total instructions in shared programs: 1397405 -> 1397315 (<.01%)
instructions in affected programs: 88252 -> 88162 (-0.10%)
helped: 20
HURT: 7
helped stats (abs) min: 1 max: 18 x̄: 7.20 x̃: 7
helped stats (rel) min: 0.03% max: 2.20% x̄: 0.37% x̃: 0.23%
HURT stats (abs)   min: 4 max: 23 x̄: 7.71 x̃: 4
HURT stats (rel)   min: 0.10% max: 0.68% x̄: 0.22% x̃: 0.11%
95% mean confidence interval for instructions value: -6.81 0.14
95% mean confidence interval for instructions %-change: -0.42% -0.02%
Inconclusive result (value mean confidence interval includes 0).

total cycles in shared programs: 119924219 -> 119931868 (<.01%)
cycles in affected programs: 45029193 -> 45036842 (0.02%)
helped: 11
HURT: 16
helped stats (abs) min: 15 max: 5490 x̄: 1655.73 x̃: 140
helped stats (rel) min: <.01% max: 0.35% x̄: 0.11% x̃: <.01%
HURT stats (abs)   min: 1 max: 2944 x̄: 1616.38 x̃: 1743
HURT stats (rel)   min: <.01% max: 0.17% x̄: 0.09% x̃: 0.10%
95% mean confidence interval for cycles value: -606.11 1172.70
95% mean confidence interval for cycles %-change: -0.04% 0.07%
Inconclusive result (value mean confidence interval includes 0).

v2:
- Include shader-db result (Jason)

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11596>
2021-07-16 15:59:56 +00:00
Sagar Ghuge 06ab737686 nir: Add optimizations for iadd3
This patch also adds has_iadd3 bit to give more control if backend
supports ternary add instruction or not.

v2:
- Add patterns in late optimization (Connor Abbott)

Suggested-by: Alyssa/Jason

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11596>
2021-07-16 15:59:56 +00:00
Sagar Ghuge e6db2299a8 intel/compiler: Allow ternary add to promote source to immediate
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11596>
2021-07-16 15:59:56 +00:00
Sagar Ghuge cde9ca616d intel/compiler: Make decision based on source type instead of opcode
This patch restructure code a little bit to check if source can be
represented as immediate operand. This is a foundation for next patch
which add checks for integer operand as well.

Suggested-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11596>
2021-07-16 15:59:56 +00:00
Sagar Ghuge 705285b9f4 intel/compiler: Add support for ternary add instruction on XeHP
v2:
- Re-arragne opcode in correct order (Matt Turner)
- Move ADD3 case closer to LRP (Jason)

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11596>
2021-07-16 15:59:56 +00:00
Sagar Ghuge e8dff256c0 nir: Add new opcode for ternary addition
v2:
- Make it 2src commutative (Connor Abbott)

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11596>
2021-07-16 15:59:55 +00:00
Timur Kristóf 6e17931d21 radv: Use pre-computed viewport transform for NGG culling state.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11839>
2021-07-16 15:22:46 +00:00
Mike Blumenkrantz c9a478f1cd radv: remove unused variable from radv_emit_viewport
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11839>
2021-07-16 15:22:46 +00:00
Mike Blumenkrantz a2ef92d7a5 radv: pre-calculate viewport transforms
this requires more storage in the viewport struct, but it avoids
the need to repeatedly calculate the same transform if e.g., a meta
operation occurs, which can save about 5% cpu in some cases

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11839>
2021-07-16 15:22:46 +00:00
Mike Blumenkrantz 1e13cb1965 radv: merge si_write_viewport into radv_emit_viewport
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11839>
2021-07-16 15:22:46 +00:00
Danylo Piliaiev 53d4485a02 freedreno: fix wrong tile aligment for 3 CCU gpu
Fixes: 78c8a8af80 "freedreno: Generate device-info tables at build time"
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5060

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11928>
2021-07-16 15:02:27 +00:00
Timur Kristóf 60c5abf685 aco: Remove s_and with exec when all lanes are active.
This helps NGG GS and culling shaders.
No Fossil DB changes without NGG culling.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11458>
2021-07-16 14:31:54 +00:00
Timur Kristóf e66f54e5c8 aco: Allow elect to take advantage of knowing when all lanes are active.
Implement elect using a pseudo-op which is lowered during the
insert_exec_mask pass. This makes it possible to emit a more
optimal sequence when the exec mask is constant.

Fossil DB results on Sienna Cichlid:
Totals from 211 (0.16% of 128647) affected shaders:
CodeSize: 2254356 -> 2240468 (-0.62%); split: -0.62%, +0.00%
Instrs: 438471 -> 434996 (-0.79%); split: -0.80%, +0.01%
Latency: 2717082 -> 2709400 (-0.28%); split: -0.28%, +0.00%
InvThroughput: 566987 -> 566342 (-0.11%); split: -0.11%, +0.00%
Copies: 40058 -> 40162 (+0.26%)
Branches: 31209 -> 31211 (+0.01%)
PreSGPRs: 9927 -> 10125 (+1.99%)

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11458>
2021-07-16 14:31:54 +00:00
Timur Kristóf b12318f26c aco: Swap s_and operand order for ballot.
This allows our optimizer to recognize this and eliminate it when
it can prove that the s_and with exec is unneeded.

Fossil DB changes on Sienna Cichlid:
Totals from 1969 (1.53% of 128647) affected shaders:
CodeSize: 9468228 -> 9469348 (+0.01%); split: -0.00%, +0.01%
Instrs: 1773566 -> 1773581 (+0.00%); split: -0.01%, +0.01%
Latency: 19504042 -> 19503385 (-0.00%); split: -0.00%, +0.00%
InvThroughput: 3617406 -> 3617333 (-0.00%)
Copies: 108998 -> 110592 (+1.46%)

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11458>
2021-07-16 14:31:54 +00:00
Jason Ekstrand f5008a48d3 intel/perf: Use intel_i915_query_flags instead of hand-rolling it
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11770>
2021-07-16 14:19:20 +00:00
Jason Ekstrand ba99d2a328 intel/dev: Use intel_i915_query_alloc in query_topology
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11770>
2021-07-16 14:19:20 +00:00
Jason Ekstrand 3fa6b8d041 iris: Use intel_i915_query for meminfo
Error handling with DRM_IOCTL_I915_QUERY is tricky and we got it wrong
in one of the two calls here.  Use the common helper instead.  This also
fixes a theoretical bug where calloc() fails.  While we're here, inline
iris_bufmgr_update_meminfo because we're not really benefiting from
having it separate anymore.

Fixes: e60114b2ae "iris/bufmgr: Query memory region info."
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11770>
2021-07-16 14:19:20 +00:00
Jason Ekstrand 35ec1d9730 anv: Use intel_i915_query_alloc for memory regions
Error handling with DRM_IOCTL_I915_QUERY is tricky and we got it wrong
in one of the two calls here.  Use the common helper instead.  This also
fixes a theoretical bug where calloc() fails.  While we're here, inline
anv_track_meminfo because we're not really benefiting from having it
separate anymore.

Fixes: 65e8d72bc1 "anv: Query memory region info"
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11770>
2021-07-16 14:19:20 +00:00
Jason Ekstrand ffdf4d7683 intel: Pull anv_i915_query into common code
We also add a helper which contains the standard query+alloc+query
pattern used by anv_gem_get_engine_info().  The caller is required to
free the pointer.

These are declared static inline not because we care about the
performance of these helpers but because we're going to use them in the
intel_device_info code and we don't want a link dependency.

Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11770>
2021-07-16 14:19:20 +00:00
Jason Ekstrand b664481ba9 anv: Handle errors properly in anv_i915_query
DRM_IOCTL_I915_QUERY is a multi-query.  The most egregious errors are
returned via the usual ioctl error mechanism but there are also
per-query errors that are indicated by item.length < 0.  We need to
handle those as well.  While we're at it, scrape errno so we can return
a proper integer error.

Fixes: c0d07c838a "anv: Support i915 query (DRM_IOCTL_I915_QUERY)..."
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11770>
2021-07-16 14:19:20 +00:00
Timur Kristóf d07e5bde75 radv: Remove num_viewports from radv_skip_ngg_culling.
NGG culling is not compiled into shaders that can use multiple
viewports, so it's not necessary to check it here.

Fixes: 9a95f5487f
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11910>
2021-07-16 13:00:36 +00:00
Timur Kristóf aa24740370 radv: Don't compile NGG culling into shaders that write viewport index.
We don't support NGG culling with multiple viewports yet.

Fixes: f30e4351de
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11910>
2021-07-16 13:00:36 +00:00
Jason Ekstrand e56d5db341 iris: Re-emit MEDIA_VFE_STATE for variable group size shaders
It implicitly contains the number of threads via the CURBE allocation
size field.

Fixes: 33c61eb2f1 "iris: Implement ARB_compute_variable_group_size"
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10640>
2021-07-16 11:02:50 +00:00
Iago Toral Quiroga d7e1c0ec2e v3dv: don't emit frame setup more than once for multilayered framebuffers
We only need to do this once per job, not once per layer.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11923>
2021-07-16 09:36:37 +00:00
Iago Toral Quiroga 51d0d83667 v3dv: don't overallocate tile state for meta TLB operations
Generally, all meta operations that are implemented via the TLB and
only involve tile load/store operations only need one layer worth
of tile state memory and a single frame setup pointing the binner
to that memory.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11923>
2021-07-16 09:36:37 +00:00
Iago Toral Quiroga 7fcc518473 v3dv: allow limiting amount of tile state allocated
With multilayered framebuffer we want to allocate enough tile state for
all layers involved, so te binner can handle layered rendering where
a geometry shader is used to redirect primitives to specific layers by
writing to gl_Layer.

However, we may also have layered framebuffers in cases where layered
rendering won't be used. Typically this will happen for meta copy/clear
operations, where we setup multilayered framebuffers but then we just
load and/or store the tile buffer without ever rendering a primitive,
let alone use a geometry shader to do layered rendering. In these cases
we can reduce the amount of tile state allocated to a sigle layer.

This patch allows us to specify if we should allocate tile state for all
layers when we start a new frame. We will take advantage of this in
later patches targetting the meta copy/clear code paths.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11923>
2021-07-16 09:36:37 +00:00