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intel/compiler: Allow ternary add to promote source to immediate 

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11596>
This commit is contained in:
Sagar Ghuge 2021-07-07 18:14:57 -07:00 committed by Marge Bot
parent cde9ca616d
commit e6db2299a8
1 changed files with 40 additions and 0 deletions
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40
src/intel/compiler/brw_fs_combine_constants.cpp
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@ -79,6 +79,7 @@ must_promote_imm(const struct intel_device_info *devinfo, const fs_inst *inst)
case SHADER_OPCODE_POW:
return devinfo->ver < 8;
case BRW_OPCODE_MAD:
case BRW_OPCODE_ADD3:
case BRW_OPCODE_LRP:
return true;
default:
@ -335,10 +336,35 @@ representable_as_hf(float f, uint16_t *hf)
return false;
}
static bool
representable_as_w(int d, int16_t *w)
{
int res = ((d & 0xffff8000) + 0x8000) & 0xffff7fff;
if (!res) {
*w = d;
return true;
}
return false;
}
static bool
representable_as_uw(unsigned ud, uint16_t *uw)
{
if (!(ud & 0xffff0000)) {
*uw = ud;
return true;
}
return false;
}
static bool
supports_src_as_imm(const struct intel_device_info *devinfo, enum opcode op)
{
switch (op) {
case BRW_OPCODE_ADD3:
return devinfo->verx10 >= 125;
case BRW_OPCODE_MAD:
return devinfo->ver == 12 && devinfo->verx10 < 125;
default:
@ -368,6 +394,20 @@ can_promote_src_as_imm(const struct intel_device_info *devinfo, fs_inst *inst,
return true;
}
}
case BRW_REGISTER_TYPE_W: {
int16_t w;
if (representable_as_w(inst->src[src_idx].d, &w)) {
inst->src[src_idx] = brw_imm_w(w);
return true;
}
}
case BRW_REGISTER_TYPE_UW: {
uint16_t uw;
if (representable_as_uw(inst->src[src_idx].ud, &uw)) {
inst->src[src_idx] = brw_imm_uw(uw);
return true;
}
}
default:
return false;
}