For DRI_PRIME setup where the dGPU -> iGPU copy can happen asynchronously,
we need to ensure that we're not continuously reusing the same back buffer.
The existing code relies on XCB_PRESENT_EVENT_IDLE_NOTIFY to decide if
a buffer is busy or idle. If this event is received before the hardware
is done using the buffer, then it will reuse the same buffer and introduce
a dependency between the copy and the next frame.
This commit mitigates this by trying to allocate a different back buffer
when called from dri3_get_buffer (not from dri3_find_back_alloc, because it
seems that it expects dri3_get_buffer - see 0cc4c7e33e).
An alternative would be to query the busy-ness using is_resource_busy
but this complicates the code to achieve the same result.
One affected app is Unigine Superposition, and this change improves the
score by 0% - 5% depending on the settings.
This behavior is enabled if PIPE_CAP_PREFER_BACK_BUFFER_REUSE is 0.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12788>
The resulting quads are actually already following the provoking vertex convention.
Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12851>
We had some with unlikely, some without it. Let's just put unlikely to
all of them.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13071>
If we store the queues in a linked list in the device as vk_queue_init
is called then we can handle enumeration in common code.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13003>
Clover likes to do this to clear our a bunch of samplers without
actually passing an array of NULL pointers. It's easy enough to
handle in iris.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13072>
When it comes to AHB, pExternalBufferInfo->handleType is already
overridden to the renderer handle type. Thus the AHB buffer prop path is
not used. However, this is not caught by cts, vvl or apps because the
host renderer memory features so far satisfy the ahb requirement.
Fixes: ebf0e45506 ("venus: add ahb image and buffer properties query support")
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Ryan Neph <ryanneph@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13076>
This was initially written by Mark Janes, and was part of MR 7354.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Mike Blumenkrantz <michael.b.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13043>
- Change section name to be more general
- Remove INTEL_SCALAR_VS (dropped as part of release 20.3)
- Sort alphabetically
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Mike Blumenkrantz <michael.b.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13043>
When the render target format is raw, the swizzle is ignored. Let's
set it to identity to avoid misleading the pandecode reader into
thinking the swizzle is applied.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Suggested-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12793>
It's just a matter of taking the sign bit into account in the
pack/unpack routines.
Needed for panvk rgb10a2_sint blits.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12793>
The components are re-ordered before packing/unpacking, so nothing to
do here except adding the missing case in the switch statements.
Needed for panvk bgr10a2_uint blits.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12793>
The output swizzle defined in the render-target descriptor is ignored
when the format is RAW. In that case, we have to swap the components
when lowering FB stores/loads if we want to get the right color.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12793>
In NIR image instructions, the array index always follows the last
image coordinate, meaning that array index is in coord.y for 1D
arrays. But the current panfrost ABI wants it in coord.z regardless of
the image dimension.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13078>
Makes p_extract more flexible and prepares it to be usable
for other use cases.
No Fossil DB changes.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11560>
This helps some viewperf subtests.
Only view XY culling is done. Edgeflags are always disabled with lines.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13048>
This improves viewperf performance on Navi1x.
All Navi1x fast launch workarounds are removed and all fast launch
codepaths are disabled.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13048>