Commit Graph

10 Commits

Author SHA1 Message Date
Rob Clark a9618e7c42 util: Add accessor for util_cpu_caps
In release builds, there should be no change, but in debug builds the
assert will help us catch undefined behavior resulting from using
util_cpu_caps before it is initialized.

With fix for u_half_test for MSVC from Jesse Natalie squashed in.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9266>
2021-02-26 18:31:19 +00:00
Tony Wasserka 2ec290cd92 util: Fix/silence variable shadowing warnings
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7552>
2020-11-16 08:49:18 +00:00
Marek Olšák ffcdf76799 util: implement F16C using inline assembly on x86_64
F16C: https://en.wikipedia.org/wiki/F16C

This also happens to fix bptc-float-modes on llvmpipe.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6987>
2020-10-06 21:07:03 -04:00
Matt Turner 1aac47db69 Revert F16C series (MR 6774)
This reverts commit 4fb2eddfdf.
This reverts commit 7a1deb16f8.
This reverts commit 2b6a172343.
This reverts commit 5af81393e4.
This reverts commit 87900afe5b.

A couple of problems were discovered after this series was merged that
cause breakage in different configurations:

   (1) It seems that using -mf16c also enables AVX, leading to SIGILL on
   platforms that do not support AVX.
   (2) Since clang only warns about unknown flags, and as I understand
   it Meson's handling in cc.has_argument() is broken, the F16C code is
   wrongly enabled when clang is used, even for example on ARM, leading
   to a compilation error.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3583
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6969>
2020-10-01 21:08:12 +00:00
Marek Olšák 87900afe5b util: implement f16c - fast half<->float conversions
This also happens to fix bptc-float-modes on llvmpipe.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6774>
2020-09-30 16:28:24 +00:00
Kristian H. Kristensen 4068d6baff glsl: Add ir_constant constructor for fp16
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3929>
2020-03-09 16:31:08 +00:00
Samuel Iglesias Gonsálvez 733ede8ff6 util: add float to float16 conversions with RTZ and RTNE
In order to be coherent with the pre-existent functions, this new API
is the one meant to be used when doing half float to float
conversions. It is no more than a wrapper for the softfloat.h API but
we meant to keep that one private.

v2:
- Replace custom f32 -> f16 RTZ implementation with the softfloat
  one (Andres).

v3:
- Added API usage clarifying comments (Caio).

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
2019-09-17 23:39:18 +03:00
Marek Olšák 38ab39f650 mesa: add ASTC 2D LDR decoder
Tested-by: Mike Lothian <mike@fireburn.co.uk>
Tested-By: Gert Wollny <gert.wollny@collabora.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
2018-07-31 18:09:57 -04:00
Brian Paul c43b0d3f91 mesa: move _mesa_half_is_negative() to half_float.h
v2: use !! in the function to be explicit about type conversion.  Though,
gcc generates the same code with or without the logical !!.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-10-10 11:28:31 -06:00
Rob Clark 183db3a645 glsl: move half<->float convertion to util
Needed in NIR too, so move out of mesa/main/imports.c

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-10-16 19:33:37 -04:00