Alyssa Rosenzweig
a2a947031a
agx: Mark the logical ends of blocks
...
We need to insert parallel copies at the logical end of blocks, before branches.
Add a pseudo instruction signaling that. Cribbed from ACO.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268 >
2022-05-01 22:00:00 -04:00
Alyssa Rosenzweig
d285c63417
agx: Add phi pseudo instruction
...
For SSA.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268 >
2022-05-01 21:58:29 -04:00
Alyssa Rosenzweig
2a4a8a8902
agx: Add p_split pseudoinstruction
...
Easier on RA for extracts.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268 >
2022-05-01 21:58:29 -04:00
Alyssa Rosenzweig
7d38bcb7ee
agx: Use pseudo ops for mov/not/and/xor/or
...
Rather than using builder magic (implicitly lowered on emit), add actual pseudo
operations (explicitly lowered before encoding). In theory this is slower, I
doubt it matters. This makes the instruction aliases first-class for IR prining
and machine inspection, which will make optimization passes easier to write.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268 >
2022-05-01 21:58:29 -04:00
Alyssa Rosenzweig
f0a973081f
agx: Use correct types for some IR enums
...
Otherwise there are implicit int->enum casts which prevent us from building as
C++ (with -fpermissive).
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268 >
2022-05-01 21:58:29 -04:00
Alyssa Rosenzweig
f248f6623c
agx: Add sample_mask instruction
...
Sets the output sample mask to a given 8-bit immediate or 16-bit
register. Also used to implement discards, which is my ES2 interest.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14219 >
2022-01-16 18:23:28 +00:00
Alyssa Rosenzweig
3d3e4928b2
agx: Add ld_vary_flat opcode
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718 >
2021-07-05 20:56:03 +00:00
Alyssa Rosenzweig
10b8563966
agx: Update ld_vary encoding mask
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718 >
2021-07-05 20:56:03 +00:00
Alyssa Rosenzweig
99b67ab355
agx: Add perspective bit to ld_var
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718 >
2021-07-05 20:56:03 +00:00
Alyssa Rosenzweig
307b8f1b2f
agx: List sr enum in Python
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11199 >
2021-06-05 20:38:22 +00:00
Alyssa Rosenzweig
cc8fec8b74
agx: Generate enums from Python
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11199 >
2021-06-05 20:38:22 +00:00
Alyssa Rosenzweig
223476aff3
agx: Model get_sr
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11199 >
2021-06-05 20:38:22 +00:00
Alyssa Rosenzweig
4fb964ccb8
agx: Model jump instructions
...
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023 >
2021-05-31 01:23:35 +05:30
Alyssa Rosenzweig
4eb8fbf780
agx: Model pop_exec
...
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023 >
2021-05-31 01:23:35 +05:30
Alyssa Rosenzweig
a270665a9e
agx: Model control flow instructions
...
Thankfully the encoding is regular, if a bit complicated.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023 >
2021-05-31 01:23:35 +05:30
Alyssa Rosenzweig
8454d08aa3
agx: Add branch target to IR
...
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023 >
2021-05-31 01:23:35 +05:30
Alyssa Rosenzweig
ad4dfb3321
agx: Add invert_cond (ccn) to IR
...
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023 >
2021-05-31 01:23:35 +05:30
Alyssa Rosenzweig
21cf528e76
agx: Add nest field to IR
...
Needed to model control flow instructions.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023 >
2021-05-31 01:23:35 +05:30
Alyssa Rosenzweig
1164c992cf
agx: Add ld_tile opcode
...
Variant of st_tile.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10720 >
2021-05-09 23:29:45 -04:00
Alyssa Rosenzweig
07fdc0015e
agx: Rename blend -> st_tile
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For symmetry.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10720 >
2021-05-09 23:29:45 -04:00
Alyssa Rosenzweig
50b5c94885
agx: Add opcode descriptions as Python
...
Pattern lifted from NIR.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582 >
2021-05-02 17:41:09 -04:00