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radv/gfx10: always set ballot_mask_bits to 64 

The codegen handles it and it adds the correct casts. This fixes
a bunch of LLVM validation errors when enabling Wave32 for compute.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
This commit is contained in:
Samuel Pitoiset 2019-08-27 09:01:02 +02:00
parent c0c55bd84f
commit fa13b2f002
1 changed files with 1 additions and 2 deletions
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3
src/amd/vulkan/radv_nir_to_llvm.c
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@ -4185,8 +4185,7 @@ LLVMModuleRef ac_translate_nir_to_llvm(struct ac_llvm_compiler *ac_llvm,
AC_FLOAT_MODE_DEFAULT;
ac_llvm_context_init(&ctx.ac, ac_llvm, options->chip_class,
options->family, float_mode, options->wave_size,
options->wave_size);
options->family, float_mode, options->wave_size, 64);
ctx.context = ctx.ac.context;
radv_nir_shader_info_init(&shader_info->info);