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pan/bi: Restrict registers to r0-r15 when compiling blend shaders 

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8417>
This commit is contained in:
Boris Brezillon 2021-01-08 19:18:36 +01:00 committed by Marge Bot
parent de0fa4de5f
commit f61be082d3
1 changed files with 2 additions and 2 deletions
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4
src/panfrost/bifrost/bi_ra.c
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@ -74,8 +74,8 @@ bi_allocate_registers(bi_context *ctx, bool *success)
if (ctx->is_blend) {
/* R0-R3 are reserved for the blend input */
l->class_start[BI_REG_CLASS_WORK] = 4 * 4;
l->class_size[BI_REG_CLASS_WORK] = 64 * 4;
l->class_start[BI_REG_CLASS_WORK] = 0;
l->class_size[BI_REG_CLASS_WORK] = 16 * 4;
} else {
/* R0 - R63, all 32-bit */
l->class_start[BI_REG_CLASS_WORK] = 0;