i965: Pass miptree pointer as function parameter in intel_vertical_texture_alignment_unit

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
This commit is contained in:
Anuj Phogat 2015-04-14 22:06:47 -07:00
parent 9edac38f2a
commit ef6b9985ea
1 changed files with 7 additions and 9 deletions

View File

@ -99,7 +99,7 @@ intel_horizontal_texture_alignment_unit(struct brw_context *brw,
static unsigned int
intel_vertical_texture_alignment_unit(struct brw_context *brw,
mesa_format format, bool multisampled)
const struct intel_mipmap_tree *mt)
{
/**
* From the "Alignment Unit Size" section of various specs, namely:
@ -124,11 +124,11 @@ intel_vertical_texture_alignment_unit(struct brw_context *brw,
* Where "*" means either VALIGN_2 or VALIGN_4 depending on the setting of
* the SURFACE_STATE "Surface Vertical Alignment" field.
*/
if (_mesa_is_format_compressed(format))
if (_mesa_is_format_compressed(mt->format))
/* See comment above for the horizontal alignment */
return brw->gen >= 9 ? 16 : 4;
if (format == MESA_FORMAT_S_UINT8)
if (mt->format == MESA_FORMAT_S_UINT8)
return brw->gen >= 7 ? 8 : 4;
/* Broadwell only supports VALIGN of 4, 8, and 16. The BSpec says 4
@ -137,10 +137,10 @@ intel_vertical_texture_alignment_unit(struct brw_context *brw,
if (brw->gen >= 8)
return 4;
if (multisampled)
if (mt->num_samples > 1)
return 4;
GLenum base_format = _mesa_get_format_base_format(format);
GLenum base_format = _mesa_get_format_base_format(mt->format);
if (brw->gen >= 6 &&
(base_format == GL_DEPTH_COMPONENT ||
@ -161,7 +161,7 @@ intel_vertical_texture_alignment_unit(struct brw_context *brw,
*
* VALIGN_4 is not supported for surface format R32G32B32_FLOAT.
*/
if (base_format == GL_YCBCR_MESA || format == MESA_FORMAT_RGB_FLOAT32)
if (base_format == GL_YCBCR_MESA || mt->format == MESA_FORMAT_RGB_FLOAT32)
return 2;
return 4;
@ -566,7 +566,6 @@ brw_miptree_layout(struct brw_context *brw,
enum intel_miptree_tiling_mode requested,
struct intel_mipmap_tree *mt)
{
bool multisampled = mt->num_samples > 1;
bool gen6_hiz_or_stencil = false;
if (brw->gen == 6 && mt->array_layout == ALL_SLICES_AT_EACH_LOD) {
@ -599,8 +598,7 @@ brw_miptree_layout(struct brw_context *brw,
}
} else {
mt->align_w = intel_horizontal_texture_alignment_unit(brw, mt);
mt->align_h =
intel_vertical_texture_alignment_unit(brw, mt->format, multisampled);
mt->align_h = intel_vertical_texture_alignment_unit(brw, mt);
}
switch (mt->target) {