ac/surface: copy the CMASK equation to radeon_surf
Only GFX9 is currently supported. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Acked-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12140>
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@ -1491,6 +1491,28 @@ static void ac_copy_dcc_equation(const struct radeon_info *info,
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}
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}
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static void ac_copy_cmask_equation(const struct radeon_info *info,
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ADDR2_COMPUTE_CMASK_INFO_OUTPUT *cmask,
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struct gfx9_meta_equation *equation)
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{
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equation->meta_block_width = cmask->metaBlkWidth;
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equation->meta_block_height = cmask->metaBlkHeight;
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equation->meta_block_depth = 1;
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if (info->chip_class == GFX9) {
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assert(cmask->equation.gfx9.num_bits <= ARRAY_SIZE(equation->u.gfx9.bit));
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equation->u.gfx9.num_bits = cmask->equation.gfx9.num_bits;
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equation->u.gfx9.num_pipe_bits = cmask->equation.gfx9.numPipeBits;
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for (unsigned b = 0; b < ARRAY_SIZE(equation->u.gfx9.bit); b++) {
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for (unsigned c = 0; c < ARRAY_SIZE(equation->u.gfx9.bit[b].coord); c++) {
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equation->u.gfx9.bit[b].coord[c].dim = cmask->equation.gfx9.bit[b].coord[c].dim;
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equation->u.gfx9.bit[b].coord[c].ord = cmask->equation.gfx9.bit[b].coord[c].ord;
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}
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}
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}
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}
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static void ac_copy_htile_equation(const struct radeon_info *info,
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ADDR2_COMPUTE_HTILE_INFO_OUTPUT *htile,
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struct gfx9_meta_equation *equation)
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@ -1907,6 +1929,8 @@ static int gfx9_compute_miptree(struct ac_addrlib *addrlib, const struct radeon_
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surf->cmask_height = cout.height;
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surf->u.gfx9.color.cmask_level0.offset = meta_mip_info[0].offset;
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surf->u.gfx9.color.cmask_level0.size = meta_mip_info[0].sliceSize;
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ac_copy_cmask_equation(info, &cout, &surf->u.gfx9.color.cmask_equation);
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}
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}
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@ -287,6 +287,9 @@ struct gfx9_surf_layout {
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/* For DCC retiling. */
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struct gfx9_meta_equation dcc_equation; /* 2D only */
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struct gfx9_meta_equation display_dcc_equation;
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/* For FCE compute. */
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struct gfx9_meta_equation cmask_equation; /* 2D only */
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} color;
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/* Z/S */
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