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radeonsi: replace si_vertex_elements::elements with separate fields 

It makes si_vertex_elements a little smaller.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
This commit is contained in:
Marek Olšák 2017-06-09 19:29:27 +02:00
parent c8b6f42e25
commit e80a056ff9
4 changed files with 14 additions and 14 deletions
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9
src/gallium/drivers/radeonsi/si_descriptors.c
View File

@ -1006,7 +1006,7 @@ static void si_vertex_buffers_begin_new_cs(struct si_context *sctx)
int i;
for (i = 0; i < count; i++) {
int vb = sctx->vertex_elements->elements[i].vertex_buffer_index;
int vb = sctx->vertex_elements->vertex_buffer_index[i];
if (vb >= ARRAY_SIZE(sctx->vertex_buffer))
continue;
@ -1065,11 +1065,10 @@ bool si_upload_vertex_buffer_descriptors(struct si_context *sctx)
assert(count <= SI_MAX_ATTRIBS);
for (i = 0; i < count; i++) {
struct pipe_vertex_element *ve = &velems->elements[i];
struct pipe_vertex_buffer *vb;
struct r600_resource *rbuffer;
unsigned offset;
unsigned vbo_index = ve->vertex_buffer_index;
unsigned vbo_index = velems->vertex_buffer_index[i];
uint32_t *desc = &ptr[i*4];
vb = &sctx->vertex_buffer[vbo_index];
@ -1079,7 +1078,7 @@ bool si_upload_vertex_buffer_descriptors(struct si_context *sctx)
continue;
}
offset = vb->buffer_offset + ve->src_offset;
offset = vb->buffer_offset + velems->src_offset[i];
va = rbuffer->gpu_address + offset;
/* Fill in T# buffer resource description */
@ -1637,7 +1636,7 @@ static void si_rebind_buffer(struct pipe_context *ctx, struct pipe_resource *buf
/* Vertex buffers. */
if (rbuffer->bind_history & PIPE_BIND_VERTEX_BUFFER) {
for (i = 0; i < num_elems; i++) {
int vb = sctx->vertex_elements->elements[i].vertex_buffer_index;
int vb = sctx->vertex_elements->vertex_buffer_index[i];
if (vb >= ARRAY_SIZE(sctx->vertex_buffer))
continue;

8
src/gallium/drivers/radeonsi/si_state.c
View File

@ -3740,8 +3740,10 @@ static void *si_create_vertex_elements(struct pipe_context *ctx,
return NULL;
}
if (elements[i].instance_divisor)
if (elements[i].instance_divisor) {
v->uses_instance_divisors = true;
v->instance_divisors[i] = elements[i].instance_divisor;
}
if (!used[vbo_index]) {
v->first_vb_use_mask |= 1 << i;
@ -3756,6 +3758,8 @@ static void *si_create_vertex_elements(struct pipe_context *ctx,
memcpy(swizzle, desc->swizzle, sizeof(swizzle));
v->format_size[i] = desc->block.bits / 8;
v->src_offset[i] = elements[i].src_offset;
v->vertex_buffer_index[i] = vbo_index;
/* The hardware always treats the 2-bit alpha channel as
* unsigned, so a shader workaround is needed. The affected
@ -3848,8 +3852,6 @@ static void *si_create_vertex_elements(struct pipe_context *ctx,
S_008F0C_NUM_FORMAT(num_format) |
S_008F0C_DATA_FORMAT(data_format);
}
memcpy(v->elements, elements, sizeof(struct pipe_vertex_element) * count);
return v;
}

4
src/gallium/drivers/radeonsi/si_state.h
View File

@ -108,7 +108,9 @@ struct si_vertex_elements
uint8_t fix_fetch[SI_MAX_ATTRIBS];
uint32_t rsrc_word3[SI_MAX_ATTRIBS];
uint32_t format_size[SI_MAX_ATTRIBS];
struct pipe_vertex_element elements[SI_MAX_ATTRIBS];
uint8_t vertex_buffer_index[SI_MAX_ATTRIBS];
uint16_t src_offset[SI_MAX_ATTRIBS];
unsigned instance_divisors[SI_MAX_ATTRIBS];
bool uses_instance_divisors;
};

7
src/gallium/drivers/radeonsi/si_state_shaders.c
View File

@ -1189,11 +1189,8 @@ static void si_shader_selector_key_vs(struct si_context *sctx,
unsigned count = MIN2(vs->info.num_inputs,
sctx->vertex_elements->count);
for (unsigned i = 0; i < count; ++i) {
prolog_key->instance_divisors[i] =
sctx->vertex_elements->elements[i].instance_divisor;
}
memcpy(prolog_key->instance_divisors,
sctx->vertex_elements->instance_divisors, count * 4);
memcpy(key->mono.vs_fix_fetch, sctx->vertex_elements->fix_fetch, count);
}