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radeonsi: Use common DCC image store check 

We need to keep RADV and RadeonSI on the same page about this due to modifiers.

Signed-off-by: Joshua Ashton <joshua@froggi.es>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13153>
This commit is contained in:
Joshua Ashton 2021-10-01 22:53:43 +01:00 committed by Marge Bot
parent fccdebd64d
commit e76956b9e0
1 changed files with 2 additions and 5 deletions
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7
src/gallium/drivers/radeonsi/si_descriptors.c
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@ -369,11 +369,8 @@ void si_set_mutable_tex_desc_fields(struct si_screen *sscreen, struct si_texture
* The same limitations apply to SDMA compressed stores because
* SDMA uses the same DCC codec.
*/
S_00A018_WRITE_COMPRESS_ENABLE(!tex->surface.u.gfx9.color.dcc.independent_64B_blocks &&
tex->surface.u.gfx9.color.dcc.independent_128B_blocks &&
tex->surface.u.gfx9.color.dcc.max_compressed_block_size ==
V_028C78_MAX_BLOCK_SIZE_128B &&
access & SI_IMAGE_ACCESS_ALLOW_DCC_STORE);
S_00A018_WRITE_COMPRESS_ENABLE(ac_surface_supports_dcc_image_stores(sscreen->info.chip_class, &tex->surface) &&
(access & SI_IMAGE_ACCESS_ALLOW_DCC_STORE));
}
state[7] = meta_va >> 16;