r600: fix constant buffer bounds.
If you have an indirect access to a constant buffer on r600/eg use a vertex fetch in the shader. However apps have expected behaviour on those out of bounds accessess (even if illegal). If the constants were being uploaded as part of a larger upload buffer, we'd set the range of allowed access to a lot larger than required so apps would get values back from other parts of the upload buffer instead of the expected out of bounds access. This fixes rendering bugs in Trine and Witcher 1, thanks to iive for nagging me effectively until I figured it out :-) Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91808 Cc: <mesa-stable@lists.freedesktop.org> Reviewed-by: Roland Scheidegger <sroland@vmware.com>
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@ -2202,7 +2202,7 @@ static void evergreen_emit_constant_buffers(struct r600_context *rctx,
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radeon_emit(cs, PKT3(PKT3_SET_RESOURCE, 8, 0) | pkt_flags);
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radeon_emit(cs, (buffer_id_base + buffer_index) * 8);
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radeon_emit(cs, va); /* RESOURCEi_WORD0 */
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radeon_emit(cs, rbuffer->b.b.width0 - cb->buffer_offset - 1); /* RESOURCEi_WORD1 */
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radeon_emit(cs, cb->buffer_size -1); /* RESOURCEi_WORD1 */
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radeon_emit(cs, /* RESOURCEi_WORD2 */
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S_030008_ENDIAN_SWAP(gs_ring_buffer ? ENDIAN_NONE : r600_endian_swap(32)) |
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S_030008_STRIDE(gs_ring_buffer ? 4 : 16) |
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@ -1729,7 +1729,7 @@ static void r600_emit_constant_buffers(struct r600_context *rctx,
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radeon_emit(cs, PKT3(PKT3_SET_RESOURCE, 7, 0));
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radeon_emit(cs, (buffer_id_base + buffer_index) * 7);
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radeon_emit(cs, offset); /* RESOURCEi_WORD0 */
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radeon_emit(cs, rbuffer->b.b.width0 - offset - 1); /* RESOURCEi_WORD1 */
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radeon_emit(cs, cb->buffer_size - 1); /* RESOURCEi_WORD1 */
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radeon_emit(cs, /* RESOURCEi_WORD2 */
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S_038008_ENDIAN_SWAP(gs_ring_buffer ? ENDIAN_NONE : r600_endian_swap(32)) |
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S_038008_STRIDE(gs_ring_buffer ? 4 : 16));
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