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radeonsi/gfx10: fix tessellation for the legacy pipeline 

ported from PAL

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
This commit is contained in:
Marek Olšák 2019-08-20 18:43:14 -04:00
parent a9bb566955
commit cab5b3861d
1 changed files with 10 additions and 0 deletions
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10
src/gallium/drivers/radeonsi/si_state_shaders.c
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@ -1308,6 +1308,16 @@ static void si_emit_shader_vs(struct si_context *sctx)
if (initial_cdw != sctx->gfx_cs->current.cdw)
sctx->context_roll = true;
/* Required programming for tessellation. (legacy pipeline only) */
if (sctx->chip_class == GFX10 &&
shader->selector->type == PIPE_SHADER_TESS_EVAL) {
radeon_opt_set_context_reg(sctx, R_028A44_VGT_GS_ONCHIP_CNTL,
SI_TRACKED_VGT_GS_ONCHIP_CNTL,
S_028A44_ES_VERTS_PER_SUBGRP(250) |
S_028A44_GS_PRIMS_PER_SUBGRP(126) |
S_028A44_GS_INST_PRIMS_IN_SUBGRP(126));
}
}
/**