i965/draw: Set the r8stencil flag after drawing

Fixes the regresion introduced with commit
bdbb527a65
"i965: Use ISL for emitting depth/stencil/hiz state on gen6+"

Found by inspection.

Prevents regressing the piglit test, fbo-depth-array stencil-draw, later
on in this series.

Cc: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
This commit is contained in:
Nanley Chery 2018-05-28 23:18:41 -07:00
parent 0eafe44ba7
commit be07cc43a2
1 changed files with 11 additions and 1 deletions

View File

@ -576,6 +576,9 @@ brw_predraw_resolve_framebuffer(struct brw_context *brw,
* If the depth buffer was written to and if it has an accompanying HiZ
* buffer, then mark that it needs a depth resolve.
*
* If the stencil buffer was written to then mark that it may need to be
* copied to an R8 texture.
*
* If the color buffer is a multisample window system buffer, then
* mark that it needs a downsample.
*
@ -619,8 +622,15 @@ brw_postdraw_set_buffers_need_resolve(struct brw_context *brw)
brw_depth_cache_add_bo(brw, depth_irb->mt->bo);
}
if (stencil_irb && brw->stencil_write_enabled)
if (stencil_irb && brw->stencil_write_enabled) {
brw_depth_cache_add_bo(brw, stencil_irb->mt->bo);
struct intel_mipmap_tree *stencil_mt =
stencil_irb->mt->stencil_mt != NULL ?
stencil_irb->mt->stencil_mt : stencil_irb->mt;
intel_miptree_finish_write(brw, stencil_mt, stencil_irb->mt_level,
stencil_irb->mt_layer,
stencil_irb->layer_count, ISL_AUX_USAGE_NONE);
}
for (unsigned i = 0; i < fb->_NumColorDrawBuffers; i++) {
struct intel_renderbuffer *irb =