radv,aco: fix shifting input VGPRs for the LS VGPR init bug on GFX9
We were incorrectly shifting the input VGPRs for the instance ID for chips affected by the LS VGPR init bug (ie. Vega10 and Raven). When there is no HS threads, the hardware loads the LS VGPR starting from VGPR 0, so they should be shifted by two. This fixes some sort of vertex explosion with Squad, Visage, Barn Finders and probably more titles that use tessellation. Note that only Vega10 and Raven were affected by this bug. Cc: mesa-stable Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4129 Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3311 Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Tested-by: Diego Viola <diego.viola@gmail.com> Reviewed-by: Rhys Perry <pendingchaos02@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8694>
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@ -11187,7 +11187,7 @@ void fix_ls_vgpr_init_bug(isel_context *ctx, Pseudo_instruction *startpgm)
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/* If there are no HS threads, SPI mistakenly loads the LS VGPRs starting at VGPR 0. */
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Temp instance_id = bld.vop2(aco_opcode::v_cndmask_b32, bld.def(v1),
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get_arg(ctx, ctx->args->ac.vs_rel_patch_id),
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get_arg(ctx, ctx->args->ac.vertex_id),
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get_arg(ctx, ctx->args->ac.instance_id),
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ls_has_nonzero_hs_threads);
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Temp vs_rel_patch_id = bld.vop2(aco_opcode::v_cndmask_b32, bld.def(v1),
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@ -3797,7 +3797,7 @@ static void ac_nir_fixup_ls_hs_input_vgprs(struct radv_shader_context *ctx)
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LLVMValueRef hs_empty = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, count,
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ctx->ac.i32_0, "");
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ctx->abi.instance_id = LLVMBuildSelect(ctx->ac.builder, hs_empty,
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ac_get_arg(&ctx->ac, ctx->args->ac.vs_rel_patch_id),
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ac_get_arg(&ctx->ac, ctx->args->ac.vertex_id),
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ctx->abi.instance_id, "");
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ctx->vs_rel_patch_id = LLVMBuildSelect(ctx->ac.builder, hs_empty,
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ac_get_arg(&ctx->ac, ctx->args->ac.tcs_rel_ids),
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