From bb8f87088cb2868d267f83c537b33c9f3e0ed36e Mon Sep 17 00:00:00 2001 From: Samuel Pitoiset Date: Mon, 25 Jan 2021 13:42:35 +0100 Subject: [PATCH] radv,aco: fix shifting input VGPRs for the LS VGPR init bug on GFX9 We were incorrectly shifting the input VGPRs for the instance ID for chips affected by the LS VGPR init bug (ie. Vega10 and Raven). When there is no HS threads, the hardware loads the LS VGPR starting from VGPR 0, so they should be shifted by two. This fixes some sort of vertex explosion with Squad, Visage, Barn Finders and probably more titles that use tessellation. Note that only Vega10 and Raven were affected by this bug. Cc: mesa-stable Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4129 Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3311 Signed-off-by: Samuel Pitoiset Tested-by: Diego Viola Reviewed-by: Rhys Perry Part-of: --- src/amd/compiler/aco_instruction_selection.cpp | 2 +- src/amd/vulkan/radv_nir_to_llvm.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/src/amd/compiler/aco_instruction_selection.cpp b/src/amd/compiler/aco_instruction_selection.cpp index 9d48e8e7f16..3219f31e8a7 100644 --- a/src/amd/compiler/aco_instruction_selection.cpp +++ b/src/amd/compiler/aco_instruction_selection.cpp @@ -11187,7 +11187,7 @@ void fix_ls_vgpr_init_bug(isel_context *ctx, Pseudo_instruction *startpgm) /* If there are no HS threads, SPI mistakenly loads the LS VGPRs starting at VGPR 0. */ Temp instance_id = bld.vop2(aco_opcode::v_cndmask_b32, bld.def(v1), - get_arg(ctx, ctx->args->ac.vs_rel_patch_id), + get_arg(ctx, ctx->args->ac.vertex_id), get_arg(ctx, ctx->args->ac.instance_id), ls_has_nonzero_hs_threads); Temp vs_rel_patch_id = bld.vop2(aco_opcode::v_cndmask_b32, bld.def(v1), diff --git a/src/amd/vulkan/radv_nir_to_llvm.c b/src/amd/vulkan/radv_nir_to_llvm.c index 458586a28f2..3818a41f047 100644 --- a/src/amd/vulkan/radv_nir_to_llvm.c +++ b/src/amd/vulkan/radv_nir_to_llvm.c @@ -3797,7 +3797,7 @@ static void ac_nir_fixup_ls_hs_input_vgprs(struct radv_shader_context *ctx) LLVMValueRef hs_empty = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, count, ctx->ac.i32_0, ""); ctx->abi.instance_id = LLVMBuildSelect(ctx->ac.builder, hs_empty, - ac_get_arg(&ctx->ac, ctx->args->ac.vs_rel_patch_id), + ac_get_arg(&ctx->ac, ctx->args->ac.vertex_id), ctx->abi.instance_id, ""); ctx->vs_rel_patch_id = LLVMBuildSelect(ctx->ac.builder, hs_empty, ac_get_arg(&ctx->ac, ctx->args->ac.tcs_rel_ids),