KonstantinSeurer
/
mesa
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

i965g: turn on texture tiling by default

This commit is contained in:
Keith Whitwell 2009-11-30 16:16:30 +00:00
parent 6781f624af
commit bb1cde755b
3 changed files with 8 additions and 7 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
src/gallium/drivers/i965/brw_screen.c
View File

@ -396,5 +396,8 @@ brw_create_screen(struct brw_winsys_screen *sws, uint pci_id)
brw_screen_tex_surface_init(bscreen); brw_screen_tex_surface_init(bscreen);
brw_screen_buffer_init(bscreen); brw_screen_buffer_init(bscreen);
bscreen->no_tiling = debug_get_option("BRW_NO_TILING", FALSE);
return &bscreen->base; return &bscreen->base;
} }

1
src/gallium/drivers/i965/brw_screen.h
View File

@ -45,6 +45,7 @@ struct brw_screen
struct pipe_screen base; struct pipe_screen base;
struct brw_chipset chipset; struct brw_chipset chipset;
struct brw_winsys_screen *sws; struct brw_winsys_screen *sws;
boolean no_tiling;
}; };
/** /**

11
src/gallium/drivers/i965/brw_screen_texture.c
View File

@ -209,14 +209,11 @@ static struct pipe_texture *brw_texture_create( struct pipe_screen *screen,
/* XXX: No tiling with compressed textures?? /* XXX: No tiling with compressed textures??
*/ */
if (tex->compressed == 0 if (tex->compressed == 0 &&
/* && bscreen->use_texture_tiling */ !bscreen->no_tiling)
/* && bscreen->kernel_exec_fencing */)
{ {
if (1) if (bscreen->chipset.is_965 &&
tex->tiling = BRW_TILING_NONE; pf_is_depth_or_stencil(templ->format))
else if (bscreen->chipset.is_965 &&
pf_is_depth_or_stencil(templ->format))
tex->tiling = BRW_TILING_Y; tex->tiling = BRW_TILING_Y;
else else
tex->tiling = BRW_TILING_X; tex->tiling = BRW_TILING_X;