i965g: pass backbuffer tiling information to driver

The gem winsys gets this information, needs to pass it on.

src/gallium/drivers/i965/brw_screen.h

@@ -72,9 +72,6 @@ struct brw_buffer
    void *ptr;
 };
 
-#define BRW_TILING_NONE  0
-#define BRW_TILING_Y     1
-#define BRW_TILING_X     2
 
 union brw_surface_id {
    struct {

src/gallium/drivers/i965/brw_screen_tex_layout.c

@@ -32,6 +32,7 @@
 
 #include "brw_screen.h"
 #include "brw_debug.h"
+#include "brw_winsys.h"
 
 /* Code to layout images in a mipmap tree for i965.
  */

src/gallium/drivers/i965/brw_screen_texture.c

@@ -472,7 +472,8 @@ boolean brw_texture_get_winsys_buffer(struct pipe_texture *texture,
 struct pipe_texture * 
 brw_texture_blanket_winsys_buffer(struct pipe_screen *screen,
                                   const struct pipe_texture *templ,
-                                  const unsigned pitch,
+                                  unsigned pitch,
+				  unsigned tiling,
                                   struct brw_winsys_buffer *buffer)
 {
    struct brw_screen *bscreen = brw_screen(screen);
@@ -495,18 +496,11 @@ brw_texture_blanket_winsys_buffer(struct pipe_screen *screen,
    tex->base.screen = screen;
 
    tex->cpp = pf_get_size(tex->base.format);
+   tex->tiling = tiling;
 
    make_empty_list(&tex->views[0]);
    make_empty_list(&tex->views[1]);
 
-   if (1)
-      tex->tiling = BRW_TILING_NONE;
-   else if (bscreen->chipset.is_965 &&
-            pf_is_depth_or_stencil(templ->format))
-      tex->tiling = BRW_TILING_Y;
-   else
-      tex->tiling = BRW_TILING_X;
-
    if (!brw_texture_layout(bscreen, tex))
       goto fail;
 

src/gallium/drivers/i965/brw_winsys.h

@@ -111,6 +111,12 @@ enum brw_buffer_data_type {
 };
 
 
+/* Matches the i915_drm definitions:
+ */
+#define BRW_TILING_NONE  0
+#define BRW_TILING_X     1
+#define BRW_TILING_Y     2
+
 
 /* Relocations to be applied with subdata in a call to sws->bo_subdata, below.
  *
@@ -271,7 +277,8 @@ boolean brw_texture_get_winsys_buffer(struct pipe_texture *texture,
 struct pipe_texture * 
 brw_texture_blanket_winsys_buffer(struct pipe_screen *screen,
                                   const struct pipe_texture *template,
-                                  const unsigned pitch,
+                                  unsigned pitch,
+				  unsigned tiling,
                                   struct brw_winsys_buffer *buffer);
 
 

src/gallium/winsys/drm/i965/gem/i965_drm_api.c

@@ -42,7 +42,7 @@ i965_libdrm_buffer_from_handle(struct i965_libdrm_winsys *idws,
                                const char* name, unsigned handle)
 {
    struct i965_libdrm_buffer *buf = CALLOC_STRUCT(i965_libdrm_buffer);
-   uint32_t tile = 0, swizzle = 0;
+   uint32_t swizzle = 0;
 
    if (BRW_DUMP)
       debug_printf("%s\n", __FUNCTION__);
@@ -60,8 +60,8 @@ i965_libdrm_buffer_from_handle(struct i965_libdrm_winsys *idws,
    if (!buf->bo)
       goto err;
 
-   drm_intel_bo_get_tiling(buf->bo, &tile, &swizzle);
-   if (tile != 0)
+   drm_intel_bo_get_tiling(buf->bo, &buf->tiling, &swizzle);
+   if (buf->tiling != 0)
       buf->map_gtt = TRUE;
 
    return buf;
@@ -100,7 +100,9 @@ i965_libdrm_texture_from_shared_handle(struct drm_api *api,
    if (!buffer)
       return NULL;
 
-   return brw_texture_blanket_winsys_buffer(screen, template, pitch, &buffer->base);
+   return brw_texture_blanket_winsys_buffer(screen, template, pitch,
+					    buffer->tiling,
+					    &buffer->base);
 }
 
 

src/gallium/winsys/drm/i965/gem/i965_drm_winsys.h

@@ -46,14 +46,12 @@ struct i965_libdrm_buffer {
 
    void *ptr;
    unsigned map_count;
-   boolean map_gtt;
+   unsigned data_type;		/* valid while mapped */
+   unsigned tiling;
 
+   boolean map_gtt;
    boolean flinked;
    unsigned flink;
-
-   unsigned data_type;		/* valid while mapped */
-
-   unsigned cheesy_refcount;
 };
 
 static INLINE struct i965_libdrm_buffer *