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radeonsi: stop using TGSI_PROPERTY_TCS_VERTICES_OUT 

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6624>
This commit is contained in:
Marek Olšák 2020-09-01 17:53:10 -04:00 committed by Marge Bot
parent a37d897d69
commit af59f06918
3 changed files with 4 additions and 8 deletions
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4
src/gallium/drivers/radeonsi/si_shader_llvm_tess.c
View File

@ -90,7 +90,7 @@ static LLVMValueRef get_tcs_out_patch_stride(struct si_shader_context *ctx)
return si_unpack_param(ctx, ctx->tcs_out_lds_layout, 0, 13);
const struct si_shader_info *info = &ctx->shader->selector->info;
unsigned tcs_out_vertices = info->properties[TGSI_PROPERTY_TCS_VERTICES_OUT];
unsigned tcs_out_vertices = info->base.tess.tcs_vertices_out;
unsigned vertex_dw_stride = get_tcs_out_vertex_dw_stride_constant(ctx);
unsigned num_patch_outputs = util_last_bit64(ctx->shader->selector->patch_outputs_written);
unsigned patch_dw_stride = tcs_out_vertices * vertex_dw_stride + num_patch_outputs * 4;
@ -138,7 +138,7 @@ static LLVMValueRef get_tcs_out_current_patch_data_offset(struct si_shader_conte
static LLVMValueRef get_num_tcs_out_vertices(struct si_shader_context *ctx)
{
unsigned tcs_out_vertices =
ctx->shader->selector ? ctx->shader->selector->info.properties[TGSI_PROPERTY_TCS_VERTICES_OUT]
ctx->shader->selector ? ctx->shader->selector->info.base.tess.tcs_vertices_out
: 0;
/* If !tcs_out_vertices, it's either the fixed-func TCS or the TCS epilog. */

4
src/gallium/drivers/radeonsi/si_shader_nir.c
View File

@ -456,10 +456,6 @@ void si_nir_scan_shader(const struct nir_shader *nir, struct si_shader_info *inf
info->base = nir->info;
info->stage = nir->info.stage;
if (nir->info.stage == MESA_SHADER_TESS_CTRL) {
info->properties[TGSI_PROPERTY_TCS_VERTICES_OUT] = nir->info.tess.tcs_vertices_out;
}
if (nir->info.stage == MESA_SHADER_TESS_EVAL) {
if (nir->info.tess.primitive_mode == GL_ISOLINES)
info->properties[TGSI_PROPERTY_TES_PRIM_MODE] = PIPE_PRIM_LINES;

4
src/gallium/drivers/radeonsi/si_state_draw.c
View File

@ -118,7 +118,7 @@ static void si_emit_derived_tess_state(struct si_context *sctx, const struct pip
if (sctx->tcs_shader.cso) {
num_tcs_outputs = util_last_bit64(tcs->outputs_written);
num_tcs_output_cp = tcs->info.properties[TGSI_PROPERTY_TCS_VERTICES_OUT];
num_tcs_output_cp = tcs->info.base.tess.tcs_vertices_out;
num_tcs_patch_outputs = util_last_bit64(tcs->patch_outputs_written);
} else {
/* No TCS. Route varyings from LS to TES. */
@ -1689,7 +1689,7 @@ static void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *i
*/
struct si_shader_selector *tcs = sctx->tcs_shader.cso;
bool ls_vgpr_fix =
tcs && info->vertices_per_patch > tcs->info.properties[TGSI_PROPERTY_TCS_VERTICES_OUT];
tcs && info->vertices_per_patch > tcs->info.base.tess.tcs_vertices_out;
if (ls_vgpr_fix != sctx->ls_vgpr_fix) {
sctx->ls_vgpr_fix = ls_vgpr_fix;