freedreno/ir3: add support for memory (cat6) instructions
Scheduled basically the same as texture (cat5) instructions, using (sy) flag for synchronization. Signed-off-by: Rob Clark <robclark@freedesktop.org>
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@ -420,6 +420,11 @@ static inline bool is_tex(struct ir3_instruction *instr)
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return (instr->category == 5);
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}
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static inline bool is_mem(struct ir3_instruction *instr)
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{
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return (instr->category == 6);
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}
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static inline bool is_input(struct ir3_instruction *instr)
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{
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return (instr->category == 2) && (instr->opc == OPC_BARY_F);
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@ -508,9 +513,6 @@ int ir3_block_ra(struct ir3_block *block, enum shader_t type,
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void ir3_block_legalize(struct ir3_block *block,
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bool *has_samp, int *max_bary);
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#ifndef ARRAY_SIZE
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# define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]))
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#endif
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/* ************************************************************************* */
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/* split this out or find some helper to use.. like main/bitset.h.. */
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@ -67,7 +67,7 @@ int ir3_delayslots(struct ir3_instruction *assigner,
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return 6;
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/* handled via sync flags: */
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if (is_sfu(assigner) || is_tex(assigner))
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if (is_sfu(assigner) || is_tex(assigner) || is_mem(assigner))
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return 0;
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/* assigner must be alu: */
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@ -168,6 +168,8 @@ static void legalize(struct ir3_legalize_ctx *ctx)
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*/
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ctx->has_samp = true;
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regmask_set(&needs_sy, n->regs[0]);
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} else if (is_mem(n)) {
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regmask_set(&needs_sy, n->regs[0]);
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}
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/* both tex/sfu appear to not always immediately consume
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