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radeonsi/gfx11: fix VM faults due to the attribute ring 

Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16509>
This commit is contained in:
Marek Olšák 2022-05-14 05:55:29 -04:00 committed by Marge Bot
parent c74d854348
commit 9b20120d57
2 changed files with 6 additions and 10 deletions
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3
src/gallium/drivers/radeonsi/si_pipe.c
View File

@ -1387,8 +1387,7 @@ static struct pipe_screen *radeonsi_screen_create_impl(struct radeon_winsys *ws,
SI_RESOURCE_FLAG_DRIVER_INTERNAL |
SI_RESOURCE_FLAG_DISCARDABLE,
PIPE_USAGE_DEFAULT,
/* TODO: remove the overallocation */
attr_ring_size * 16, 2 * 1024 * 1024);
attr_ring_size, 2 * 1024 * 1024);
}
/* Create the auxiliary context. This must be done last. */

13
src/gallium/drivers/radeonsi/si_state.c
View File

@ -5883,14 +5883,11 @@ void si_init_cs_preamble_state(struct si_context *sctx, bool uses_reg_shadowing)
S_028620_VERTEX_RATE(2) | S_028620_PRIM_RATE(1));
/* We must wait for idle before changing the SPI attribute ring registers. */
si_pm4_cmd_add(pm4, PKT3(PKT3_EVENT_WRITE, 0, 0));
si_pm4_cmd_add(pm4, EVENT_TYPE(V_028A90_VS_PARTIAL_FLUSH) | EVENT_INDEX(4));
si_pm4_cmd_add(pm4, PKT3(PKT3_EVENT_WRITE, 0, 0));
si_pm4_cmd_add(pm4, EVENT_TYPE(V_028A90_VGT_FLUSH) | EVENT_INDEX(0));
si_pm4_cmd_add(pm4, PKT3(PKT3_EVENT_WRITE, 0, 0));
si_pm4_cmd_add(pm4, EVENT_TYPE(V_028A90_PS_PARTIAL_FLUSH) | EVENT_INDEX(4));
/* TODO: Find a more reliable way to wait for idle. */
for (unsigned i = 0; i < 4; i++) {
si_pm4_cmd_add(pm4, PKT3(PKT3_EVENT_WRITE, 0, 0));
si_pm4_cmd_add(pm4, EVENT_TYPE(V_028A90_PS_PARTIAL_FLUSH) | EVENT_INDEX(4));
}
si_pm4_set_reg(pm4, R_031110_SPI_GS_THROTTLE_CNTL1, 0x12355123);
si_pm4_set_reg(pm4, R_031114_SPI_GS_THROTTLE_CNTL2, 0x1544D);