r600g,radeonsi: consolidate buffer code, add handling of DISCARD_RANGE for SI
This adds 2 optimizations for radeonsi: - handling of DISCARD_RANGE - mapping an uninitialized buffer range is automatically UNSYNCHRONIZED Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
This commit is contained in:
parent
12806449fa
commit
91aca8c662
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@ -1,7 +1,6 @@
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C_SOURCES = \
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r600_asm.c \
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r600_blit.c \
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r600_buffer.c \
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r600_hw_context.c \
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r600_isa.c \
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r600_pipe.c \
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@ -1,202 +0,0 @@
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/*
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* Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* on the rights to use, copy, modify, merge, publish, distribute, sub
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* license, and/or sell copies of the Software, and to permit persons to whom
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* the Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
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* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
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* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
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* USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors:
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* Jerome Glisse
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* Corbin Simpson <MostAwesomeDude@gmail.com>
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*/
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#include "r600_pipe.h"
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#include "util/u_upload_mgr.h"
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#include "util/u_memory.h"
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#include "util/u_surface.h"
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static void r600_buffer_destroy(struct pipe_screen *screen,
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struct pipe_resource *buf)
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{
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struct r600_resource *rbuffer = r600_resource(buf);
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util_range_destroy(&rbuffer->valid_buffer_range);
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pb_reference(&rbuffer->buf, NULL);
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FREE(rbuffer);
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}
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static void *r600_buffer_get_transfer(struct pipe_context *ctx,
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struct pipe_resource *resource,
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unsigned level,
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unsigned usage,
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const struct pipe_box *box,
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struct pipe_transfer **ptransfer,
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void *data, struct r600_resource *staging,
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unsigned offset)
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{
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struct r600_context *rctx = (struct r600_context*)ctx;
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struct r600_transfer *transfer = util_slab_alloc(&rctx->pool_transfers);
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transfer->transfer.resource = resource;
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transfer->transfer.level = level;
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transfer->transfer.usage = usage;
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transfer->transfer.box = *box;
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transfer->transfer.stride = 0;
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transfer->transfer.layer_stride = 0;
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transfer->offset = offset;
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transfer->staging = staging;
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*ptransfer = &transfer->transfer;
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return data;
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}
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static void *r600_buffer_transfer_map(struct pipe_context *ctx,
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struct pipe_resource *resource,
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unsigned level,
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unsigned usage,
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const struct pipe_box *box,
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struct pipe_transfer **ptransfer)
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{
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struct r600_context *rctx = (struct r600_context*)ctx;
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struct r600_resource *rbuffer = r600_resource(resource);
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uint8_t *data;
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assert(box->x + box->width <= resource->width0);
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/* See if the buffer range being mapped has never been initialized,
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* in which case it can be mapped unsynchronized. */
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if (!(usage & PIPE_TRANSFER_UNSYNCHRONIZED) &&
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usage & PIPE_TRANSFER_WRITE &&
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!util_ranges_intersect(&rbuffer->valid_buffer_range, box->x, box->x + box->width)) {
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usage |= PIPE_TRANSFER_UNSYNCHRONIZED;
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}
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if (usage & PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE &&
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!(usage & PIPE_TRANSFER_UNSYNCHRONIZED)) {
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assert(usage & PIPE_TRANSFER_WRITE);
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/* Check if mapping this buffer would cause waiting for the GPU. */
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if (r600_rings_is_buffer_referenced(&rctx->b, rbuffer->cs_buf, RADEON_USAGE_READWRITE) ||
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rctx->b.ws->buffer_is_busy(rbuffer->buf, RADEON_USAGE_READWRITE)) {
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rctx->b.invalidate_buffer(&rctx->b.b, &rbuffer->b.b);
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}
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}
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else if ((usage & PIPE_TRANSFER_DISCARD_RANGE) &&
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!(usage & PIPE_TRANSFER_UNSYNCHRONIZED) &&
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!(rctx->screen->b.debug_flags & DBG_NO_DISCARD_RANGE) &&
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(rctx->screen->b.has_cp_dma ||
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(rctx->screen->b.has_streamout &&
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/* The buffer range must be aligned to 4 with streamout. */
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box->x % 4 == 0 && box->width % 4 == 0))) {
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assert(usage & PIPE_TRANSFER_WRITE);
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/* Check if mapping this buffer would cause waiting for the GPU. */
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if (r600_rings_is_buffer_referenced(&rctx->b, rbuffer->cs_buf, RADEON_USAGE_READWRITE) ||
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rctx->b.ws->buffer_is_busy(rbuffer->buf, RADEON_USAGE_READWRITE)) {
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/* Do a wait-free write-only transfer using a temporary buffer. */
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unsigned offset;
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struct r600_resource *staging = NULL;
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u_upload_alloc(rctx->uploader, 0, box->width + (box->x % R600_MAP_BUFFER_ALIGNMENT),
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&offset, (struct pipe_resource**)&staging, (void**)&data);
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if (staging) {
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data += box->x % R600_MAP_BUFFER_ALIGNMENT;
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return r600_buffer_get_transfer(ctx, resource, level, usage, box,
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ptransfer, data, staging, offset);
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}
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}
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}
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/* mmap and synchronize with rings */
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data = r600_buffer_map_sync_with_rings(&rctx->b, rbuffer, usage);
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if (!data) {
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return NULL;
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}
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data += box->x;
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return r600_buffer_get_transfer(ctx, resource, level, usage, box,
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ptransfer, data, NULL, 0);
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}
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static void r600_buffer_transfer_unmap(struct pipe_context *pipe,
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struct pipe_transfer *transfer)
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{
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struct r600_context *rctx = (struct r600_context*)pipe;
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struct r600_transfer *rtransfer = (struct r600_transfer*)transfer;
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struct r600_resource *rbuffer = r600_resource(transfer->resource);
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if (rtransfer->staging) {
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struct pipe_resource *dst, *src;
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unsigned soffset, doffset, size;
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struct pipe_box box;
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dst = transfer->resource;
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src = &rtransfer->staging->b.b;
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size = transfer->box.width;
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doffset = transfer->box.x;
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soffset = rtransfer->offset + transfer->box.x % R600_MAP_BUFFER_ALIGNMENT;
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u_box_1d(soffset, size, &box);
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/* Copy the staging buffer into the original one. */
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if (!(size % 4) && !(doffset % 4) && !(soffset % 4) &&
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rctx->b.dma_copy(pipe, dst, 0, doffset, 0, 0, src, 0, &box)) {
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/* DONE. */
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} else {
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pipe->resource_copy_region(pipe, dst, 0, doffset, 0, 0, src, 0, &box);
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}
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pipe_resource_reference((struct pipe_resource**)&rtransfer->staging, NULL);
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}
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if (transfer->usage & PIPE_TRANSFER_WRITE) {
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util_range_add(&rbuffer->valid_buffer_range, transfer->box.x,
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transfer->box.x + transfer->box.width);
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}
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util_slab_free(&rctx->pool_transfers, transfer);
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}
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static const struct u_resource_vtbl r600_buffer_vtbl =
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{
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u_default_resource_get_handle, /* get_handle */
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r600_buffer_destroy, /* resource_destroy */
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r600_buffer_transfer_map, /* transfer_map */
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NULL, /* transfer_flush_region */
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r600_buffer_transfer_unmap, /* transfer_unmap */
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NULL /* transfer_inline_write */
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};
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struct pipe_resource *r600_buffer_create(struct pipe_screen *screen,
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const struct pipe_resource *templ,
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unsigned alignment)
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{
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struct r600_screen *rscreen = (struct r600_screen*)screen;
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struct r600_resource *rbuffer;
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rbuffer = MALLOC_STRUCT(r600_resource);
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rbuffer->b.b = *templ;
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pipe_reference_init(&rbuffer->b.b.reference, 1);
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rbuffer->b.b.screen = screen;
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rbuffer->b.vtbl = &r600_buffer_vtbl;
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util_range_init(&rbuffer->valid_buffer_range);
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if (!r600_init_resource(&rscreen->b, rbuffer, templ->width0, alignment, TRUE, templ->usage)) {
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FREE(rbuffer);
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return NULL;
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}
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return &rbuffer->b.b;
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}
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@ -179,13 +179,9 @@ static void r600_destroy_context(struct pipe_context *context)
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if (rctx->blitter) {
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util_blitter_destroy(rctx->blitter);
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}
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if (rctx->uploader) {
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u_upload_destroy(rctx->uploader);
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}
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if (rctx->allocator_fetch_shader) {
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u_suballocator_destroy(rctx->allocator_fetch_shader);
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}
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util_slab_destroy(&rctx->pool_transfers);
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r600_release_command_buffer(&rctx->start_cs_cmd);
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if (rctx == NULL)
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return NULL;
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util_slab_create(&rctx->pool_transfers,
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sizeof(struct r600_transfer), 64,
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UTIL_SLAB_SINGLETHREADED);
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rctx->b.b.screen = screen;
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rctx->b.b.priv = priv;
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rctx->b.b.destroy = r600_destroy_context;
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rctx->b.rings.dma.flushing = false;
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}
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rctx->uploader = u_upload_create(&rctx->b.b, 1024 * 1024, 256,
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PIPE_BIND_INDEX_BUFFER |
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PIPE_BIND_CONSTANT_BUFFER);
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if (!rctx->uploader)
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goto fail;
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rctx->allocator_fetch_shader = u_suballocator_create(&rctx->b.b, 64 * 1024, 256,
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0, PIPE_USAGE_STATIC, FALSE);
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if (!rctx->allocator_fetch_shader)
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@ -34,7 +34,6 @@
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#include "r600_resource.h"
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#include "util/u_blitter.h"
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#include "util/u_slab.h"
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#include "util/u_suballoc.h"
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#include "util/u_double_list.h"
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#include "util/u_transfer.h"
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#define R600_BIG_ENDIAN 0
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#endif
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#define R600_MAP_BUFFER_ALIGNMENT 64
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#define R600_QUERY_DRAW_CALLS (PIPE_QUERY_DRIVER_SPECIFIC + 0)
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#define R600_QUERY_REQUESTED_VRAM (PIPE_QUERY_DRIVER_SPECIFIC + 1)
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#define R600_QUERY_REQUESTED_GTT (PIPE_QUERY_DRIVER_SPECIFIC + 2)
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@ -399,9 +396,7 @@ struct r600_context {
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struct r600_common_context b;
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struct r600_screen *screen;
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struct blitter_context *blitter;
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struct u_upload_mgr *uploader;
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struct u_suballocator *allocator_fetch_shader;
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struct util_slab_mempool pool_transfers;
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unsigned initial_gfx_cs_size;
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/* Hardware info. */
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void r600_decompress_color_textures(struct r600_context *rctx,
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struct r600_samplerview_state *textures);
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/* r600_buffer.c */
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struct pipe_resource *r600_buffer_create(struct pipe_screen *screen,
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const struct pipe_resource *templ,
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unsigned alignment);
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/* r600_pipe.c */
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const char * r600_llvm_gpu_string(enum radeon_family family);
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@ -953,10 +953,10 @@ static void r600_set_constant_buffer(struct pipe_context *ctx, uint shader, uint
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tmpPtr[i] = util_bswap32(((uint32_t *)ptr)[i]);
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}
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u_upload_data(rctx->uploader, 0, size, tmpPtr, &cb->buffer_offset, &cb->buffer);
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u_upload_data(rctx->b.uploader, 0, size, tmpPtr, &cb->buffer_offset, &cb->buffer);
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free(tmpPtr);
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} else {
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u_upload_data(rctx->uploader, 0, input->buffer_size, ptr, &cb->buffer_offset, &cb->buffer);
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u_upload_data(rctx->b.uploader, 0, input->buffer_size, ptr, &cb->buffer_offset, &cb->buffer);
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}
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/* account it in gtt */
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rctx->b.gtt += input->buffer_size;
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@ -1257,7 +1257,7 @@ static void r600_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info
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unsigned out_offset;
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void *ptr;
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u_upload_alloc(rctx->uploader, 0, info.count * 2,
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u_upload_alloc(rctx->b.uploader, 0, info.count * 2,
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&out_offset, &out_buffer, &ptr);
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util_shorten_ubyte_elts_to_userptr(
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@ -1276,7 +1276,7 @@ static void r600_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info
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* Note: Instanced rendering in combination with immediate indices hangs. */
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if (ib.user_buffer && (R600_BIG_ENDIAN || info.instance_count > 1 ||
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info.count*ib.index_size > 20)) {
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u_upload_data(rctx->uploader, 0, info.count * ib.index_size,
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u_upload_data(rctx->b.uploader, 0, info.count * ib.index_size,
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ib.user_buffer, &ib.offset, &ib.buffer);
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ib.user_buffer = NULL;
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}
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@ -1452,7 +1452,7 @@ void r600_draw_rectangle(struct blitter_context *blitter,
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/* Upload vertices. The hw rectangle has only 3 vertices,
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* I guess the 4th one is derived from the first 3.
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* The vertex specification should match u_blitter's vertex element state. */
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u_upload_alloc(rctx->uploader, 0, sizeof(float) * 24, &offset, &buf, (void**)&vb);
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u_upload_alloc(rctx->b.uploader, 0, sizeof(float) * 24, &offset, &buf, (void**)&vb);
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vb[0] = x1;
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vb[1] = y1;
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vb[2] = depth;
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@ -25,6 +25,8 @@
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*/
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#include "r600_cs.h"
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#include "util/u_memory.h"
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#include "util/u_upload_mgr.h"
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#include <inttypes.h>
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boolean r600_rings_is_buffer_referenced(struct r600_common_context *ctx,
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@ -146,3 +148,175 @@ bool r600_init_resource(struct r600_common_screen *rscreen,
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}
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return true;
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}
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static void r600_buffer_destroy(struct pipe_screen *screen,
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struct pipe_resource *buf)
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{
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struct r600_resource *rbuffer = r600_resource(buf);
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util_range_destroy(&rbuffer->valid_buffer_range);
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pb_reference(&rbuffer->buf, NULL);
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FREE(rbuffer);
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}
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static void *r600_buffer_get_transfer(struct pipe_context *ctx,
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struct pipe_resource *resource,
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unsigned level,
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unsigned usage,
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const struct pipe_box *box,
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struct pipe_transfer **ptransfer,
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void *data, struct r600_resource *staging,
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unsigned offset)
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{
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struct r600_common_context *rctx = (struct r600_common_context*)ctx;
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struct r600_transfer *transfer = util_slab_alloc(&rctx->pool_transfers);
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transfer->transfer.resource = resource;
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transfer->transfer.level = level;
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transfer->transfer.usage = usage;
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transfer->transfer.box = *box;
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transfer->transfer.stride = 0;
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transfer->transfer.layer_stride = 0;
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transfer->offset = offset;
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transfer->staging = staging;
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*ptransfer = &transfer->transfer;
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return data;
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}
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static void *r600_buffer_transfer_map(struct pipe_context *ctx,
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struct pipe_resource *resource,
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unsigned level,
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unsigned usage,
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const struct pipe_box *box,
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struct pipe_transfer **ptransfer)
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{
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struct r600_common_context *rctx = (struct r600_common_context*)ctx;
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struct r600_common_screen *rscreen = (struct r600_common_screen*)ctx->screen;
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struct r600_resource *rbuffer = r600_resource(resource);
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uint8_t *data;
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assert(box->x + box->width <= resource->width0);
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/* See if the buffer range being mapped has never been initialized,
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* in which case it can be mapped unsynchronized. */
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if (!(usage & PIPE_TRANSFER_UNSYNCHRONIZED) &&
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usage & PIPE_TRANSFER_WRITE &&
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!util_ranges_intersect(&rbuffer->valid_buffer_range, box->x, box->x + box->width)) {
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usage |= PIPE_TRANSFER_UNSYNCHRONIZED;
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}
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if (usage & PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE &&
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!(usage & PIPE_TRANSFER_UNSYNCHRONIZED)) {
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assert(usage & PIPE_TRANSFER_WRITE);
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/* Check if mapping this buffer would cause waiting for the GPU. */
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if (r600_rings_is_buffer_referenced(rctx, rbuffer->cs_buf, RADEON_USAGE_READWRITE) ||
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rctx->ws->buffer_is_busy(rbuffer->buf, RADEON_USAGE_READWRITE)) {
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rctx->invalidate_buffer(&rctx->b, &rbuffer->b.b);
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}
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}
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else if ((usage & PIPE_TRANSFER_DISCARD_RANGE) &&
|
||||
!(usage & PIPE_TRANSFER_UNSYNCHRONIZED) &&
|
||||
!(rscreen->debug_flags & DBG_NO_DISCARD_RANGE) &&
|
||||
(rscreen->has_cp_dma ||
|
||||
(rscreen->has_streamout &&
|
||||
/* The buffer range must be aligned to 4 with streamout. */
|
||||
box->x % 4 == 0 && box->width % 4 == 0))) {
|
||||
assert(usage & PIPE_TRANSFER_WRITE);
|
||||
|
||||
/* Check if mapping this buffer would cause waiting for the GPU. */
|
||||
if (r600_rings_is_buffer_referenced(rctx, rbuffer->cs_buf, RADEON_USAGE_READWRITE) ||
|
||||
rctx->ws->buffer_is_busy(rbuffer->buf, RADEON_USAGE_READWRITE)) {
|
||||
/* Do a wait-free write-only transfer using a temporary buffer. */
|
||||
unsigned offset;
|
||||
struct r600_resource *staging = NULL;
|
||||
|
||||
u_upload_alloc(rctx->uploader, 0, box->width + (box->x % R600_MAP_BUFFER_ALIGNMENT),
|
||||
&offset, (struct pipe_resource**)&staging, (void**)&data);
|
||||
|
||||
if (staging) {
|
||||
data += box->x % R600_MAP_BUFFER_ALIGNMENT;
|
||||
return r600_buffer_get_transfer(ctx, resource, level, usage, box,
|
||||
ptransfer, data, staging, offset);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
data = r600_buffer_map_sync_with_rings(rctx, rbuffer, usage);
|
||||
if (!data) {
|
||||
return NULL;
|
||||
}
|
||||
data += box->x;
|
||||
|
||||
return r600_buffer_get_transfer(ctx, resource, level, usage, box,
|
||||
ptransfer, data, NULL, 0);
|
||||
}
|
||||
|
||||
static void r600_buffer_transfer_unmap(struct pipe_context *ctx,
|
||||
struct pipe_transfer *transfer)
|
||||
{
|
||||
struct r600_common_context *rctx = (struct r600_common_context*)ctx;
|
||||
struct r600_transfer *rtransfer = (struct r600_transfer*)transfer;
|
||||
struct r600_resource *rbuffer = r600_resource(transfer->resource);
|
||||
|
||||
if (rtransfer->staging) {
|
||||
struct pipe_resource *dst, *src;
|
||||
unsigned soffset, doffset, size;
|
||||
struct pipe_box box;
|
||||
|
||||
dst = transfer->resource;
|
||||
src = &rtransfer->staging->b.b;
|
||||
size = transfer->box.width;
|
||||
doffset = transfer->box.x;
|
||||
soffset = rtransfer->offset + transfer->box.x % R600_MAP_BUFFER_ALIGNMENT;
|
||||
|
||||
u_box_1d(soffset, size, &box);
|
||||
|
||||
/* Copy the staging buffer into the original one. */
|
||||
if (!(size % 4) && !(doffset % 4) && !(soffset % 4) &&
|
||||
rctx->dma_copy(ctx, dst, 0, doffset, 0, 0, src, 0, &box)) {
|
||||
/* DONE. */
|
||||
} else {
|
||||
ctx->resource_copy_region(ctx, dst, 0, doffset, 0, 0, src, 0, &box);
|
||||
}
|
||||
pipe_resource_reference((struct pipe_resource**)&rtransfer->staging, NULL);
|
||||
}
|
||||
|
||||
if (transfer->usage & PIPE_TRANSFER_WRITE) {
|
||||
util_range_add(&rbuffer->valid_buffer_range, transfer->box.x,
|
||||
transfer->box.x + transfer->box.width);
|
||||
}
|
||||
util_slab_free(&rctx->pool_transfers, transfer);
|
||||
}
|
||||
|
||||
static const struct u_resource_vtbl r600_buffer_vtbl =
|
||||
{
|
||||
NULL, /* get_handle */
|
||||
r600_buffer_destroy, /* resource_destroy */
|
||||
r600_buffer_transfer_map, /* transfer_map */
|
||||
NULL, /* transfer_flush_region */
|
||||
r600_buffer_transfer_unmap, /* transfer_unmap */
|
||||
NULL /* transfer_inline_write */
|
||||
};
|
||||
|
||||
struct pipe_resource *r600_buffer_create(struct pipe_screen *screen,
|
||||
const struct pipe_resource *templ,
|
||||
unsigned alignment)
|
||||
{
|
||||
struct r600_common_screen *rscreen = (struct r600_common_screen*)screen;
|
||||
struct r600_resource *rbuffer;
|
||||
|
||||
rbuffer = MALLOC_STRUCT(r600_resource);
|
||||
|
||||
rbuffer->b.b = *templ;
|
||||
pipe_reference_init(&rbuffer->b.b.reference, 1);
|
||||
rbuffer->b.b.screen = screen;
|
||||
rbuffer->b.vtbl = &r600_buffer_vtbl;
|
||||
util_range_init(&rbuffer->valid_buffer_range);
|
||||
|
||||
if (!r600_init_resource(rscreen, rbuffer, templ->width0, alignment, TRUE, templ->usage)) {
|
||||
FREE(rbuffer);
|
||||
return NULL;
|
||||
}
|
||||
return &rbuffer->b.b;
|
||||
}
|
||||
|
|
|
@ -28,6 +28,7 @@
|
|||
#include "r600_cs.h"
|
||||
#include "tgsi/tgsi_parse.h"
|
||||
#include "util/u_format_s3tc.h"
|
||||
#include "util/u_upload_mgr.h"
|
||||
#include <inttypes.h>
|
||||
|
||||
static const struct debug_named_value common_debug_options[] = {
|
||||
|
@ -223,6 +224,10 @@ void r600_common_screen_cleanup(struct r600_common_screen *rscreen)
|
|||
bool r600_common_context_init(struct r600_common_context *rctx,
|
||||
struct r600_common_screen *rscreen)
|
||||
{
|
||||
util_slab_create(&rctx->pool_transfers,
|
||||
sizeof(struct r600_transfer), 64,
|
||||
UTIL_SLAB_SINGLETHREADED);
|
||||
|
||||
rctx->ws = rscreen->ws;
|
||||
rctx->family = rscreen->family;
|
||||
rctx->chip_class = rscreen->chip_class;
|
||||
|
@ -234,11 +239,23 @@ bool r600_common_context_init(struct r600_common_context *rctx,
|
|||
if (!rctx->allocator_so_filled_size)
|
||||
return false;
|
||||
|
||||
rctx->uploader = u_upload_create(&rctx->b, 1024 * 1024, 256,
|
||||
PIPE_BIND_INDEX_BUFFER |
|
||||
PIPE_BIND_CONSTANT_BUFFER);
|
||||
if (!rctx->uploader)
|
||||
return false;
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
void r600_common_context_cleanup(struct r600_common_context *rctx)
|
||||
{
|
||||
if (rctx->uploader) {
|
||||
u_upload_destroy(rctx->uploader);
|
||||
}
|
||||
|
||||
util_slab_destroy(&rctx->pool_transfers);
|
||||
|
||||
if (rctx->allocator_so_filled_size) {
|
||||
u_suballocator_destroy(rctx->allocator_so_filled_size);
|
||||
}
|
||||
|
|
|
@ -35,6 +35,7 @@
|
|||
#include "../../winsys/radeon/drm/radeon_winsys.h"
|
||||
|
||||
#include "util/u_range.h"
|
||||
#include "util/u_slab.h"
|
||||
#include "util/u_suballoc.h"
|
||||
#include "util/u_transfer.h"
|
||||
|
||||
|
@ -77,6 +78,8 @@
|
|||
#define DBG_NO_DISCARD_RANGE (1 << 14)
|
||||
/* The maximum allowed bit is 15. */
|
||||
|
||||
#define R600_MAP_BUFFER_ALIGNMENT 64
|
||||
|
||||
struct r600_common_context;
|
||||
|
||||
struct r600_resource {
|
||||
|
@ -225,7 +228,9 @@ struct r600_common_context {
|
|||
enum chip_class chip_class;
|
||||
struct r600_rings rings;
|
||||
|
||||
struct u_upload_mgr *uploader;
|
||||
struct u_suballocator *allocator_so_filled_size;
|
||||
struct util_slab_mempool pool_transfers;
|
||||
|
||||
/* Current unaccounted memory usage. */
|
||||
uint64_t vram;
|
||||
|
@ -273,6 +278,9 @@ bool r600_init_resource(struct r600_common_screen *rscreen,
|
|||
struct r600_resource *res,
|
||||
unsigned size, unsigned alignment,
|
||||
bool use_reusable_pool, unsigned usage);
|
||||
struct pipe_resource *r600_buffer_create(struct pipe_screen *screen,
|
||||
const struct pipe_resource *templ,
|
||||
unsigned alignment);
|
||||
|
||||
/* r600_common_pipe.c */
|
||||
bool r600_common_screen_init(struct r600_common_screen *rscreen,
|
||||
|
|
|
@ -35,105 +35,10 @@
|
|||
#include "r600.h"
|
||||
#include "radeonsi_pipe.h"
|
||||
|
||||
static void r600_buffer_destroy(struct pipe_screen *screen,
|
||||
struct pipe_resource *buf)
|
||||
{
|
||||
struct r600_resource *rbuffer = r600_resource(buf);
|
||||
|
||||
pb_reference(&rbuffer->buf, NULL);
|
||||
FREE(rbuffer);
|
||||
}
|
||||
|
||||
static void *r600_buffer_transfer_map(struct pipe_context *ctx,
|
||||
struct pipe_resource *resource,
|
||||
unsigned level,
|
||||
unsigned usage,
|
||||
const struct pipe_box *box,
|
||||
struct pipe_transfer **ptransfer)
|
||||
{
|
||||
struct r600_context *rctx = (struct r600_context*)ctx;
|
||||
struct pipe_transfer *transfer;
|
||||
struct r600_resource *rbuffer = r600_resource(resource);
|
||||
uint8_t *data;
|
||||
|
||||
if (usage & PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE &&
|
||||
!(usage & PIPE_TRANSFER_UNSYNCHRONIZED)) {
|
||||
assert(usage & PIPE_TRANSFER_WRITE);
|
||||
|
||||
/* Check if mapping this buffer would cause waiting for the GPU. */
|
||||
if (r600_rings_is_buffer_referenced(&rctx->b, rbuffer->cs_buf, RADEON_USAGE_READWRITE) ||
|
||||
rctx->b.ws->buffer_is_busy(rbuffer->buf, RADEON_USAGE_READWRITE)) {
|
||||
rctx->b.invalidate_buffer(&rctx->b.b, &rbuffer->b.b);
|
||||
}
|
||||
}
|
||||
|
||||
data = rctx->b.ws->buffer_map(rbuffer->cs_buf, rctx->b.rings.gfx.cs, usage);
|
||||
if (!data) {
|
||||
return NULL;
|
||||
}
|
||||
|
||||
transfer = util_slab_alloc(&rctx->pool_transfers);
|
||||
transfer->resource = resource;
|
||||
transfer->level = level;
|
||||
transfer->usage = usage;
|
||||
transfer->box = *box;
|
||||
transfer->stride = 0;
|
||||
transfer->layer_stride = 0;
|
||||
*ptransfer = transfer;
|
||||
|
||||
return (uint8_t*)data + transfer->box.x;
|
||||
}
|
||||
|
||||
static void r600_buffer_transfer_unmap(struct pipe_context *ctx,
|
||||
struct pipe_transfer *transfer)
|
||||
{
|
||||
struct r600_context *rctx = (struct r600_context*)ctx;
|
||||
util_slab_free(&rctx->pool_transfers, transfer);
|
||||
}
|
||||
|
||||
static void r600_buffer_transfer_flush_region(struct pipe_context *pipe,
|
||||
struct pipe_transfer *transfer,
|
||||
const struct pipe_box *box)
|
||||
{
|
||||
}
|
||||
|
||||
static const struct u_resource_vtbl r600_buffer_vtbl =
|
||||
{
|
||||
u_default_resource_get_handle, /* get_handle */
|
||||
r600_buffer_destroy, /* resource_destroy */
|
||||
r600_buffer_transfer_map, /* transfer_map */
|
||||
r600_buffer_transfer_flush_region, /* transfer_flush_region */
|
||||
r600_buffer_transfer_unmap, /* transfer_unmap */
|
||||
NULL /* transfer_inline_write */
|
||||
};
|
||||
|
||||
struct pipe_resource *si_buffer_create(struct pipe_screen *screen,
|
||||
const struct pipe_resource *templ)
|
||||
{
|
||||
struct r600_screen *rscreen = (struct r600_screen*)screen;
|
||||
struct r600_resource *rbuffer;
|
||||
/* XXX We probably want a different alignment for buffers and textures. */
|
||||
unsigned alignment = 4096;
|
||||
|
||||
rbuffer = MALLOC_STRUCT(r600_resource);
|
||||
|
||||
rbuffer->b.b = *templ;
|
||||
pipe_reference_init(&rbuffer->b.b.reference, 1);
|
||||
rbuffer->b.b.screen = screen;
|
||||
rbuffer->b.vtbl = &r600_buffer_vtbl;
|
||||
util_range_init(&rbuffer->valid_buffer_range);
|
||||
|
||||
if (!r600_init_resource(&rscreen->b, rbuffer, templ->width0, alignment, TRUE, templ->usage)) {
|
||||
FREE(rbuffer);
|
||||
return NULL;
|
||||
}
|
||||
return &rbuffer->b.b;
|
||||
}
|
||||
|
||||
void r600_upload_index_buffer(struct r600_context *rctx,
|
||||
struct pipe_index_buffer *ib, unsigned count)
|
||||
{
|
||||
u_upload_data(rctx->uploader, 0, count * ib->index_size,
|
||||
u_upload_data(rctx->b.uploader, 0, count * ib->index_size,
|
||||
ib->user_buffer, &ib->offset, &ib->buffer);
|
||||
}
|
||||
|
||||
|
@ -154,12 +59,12 @@ void r600_upload_const_buffer(struct r600_context *rctx, struct r600_resource **
|
|||
tmpPtr[i] = util_bswap32(((uint32_t *)ptr)[i]);
|
||||
}
|
||||
|
||||
u_upload_data(rctx->uploader, 0, size, tmpPtr, const_offset,
|
||||
u_upload_data(rctx->b.uploader, 0, size, tmpPtr, const_offset,
|
||||
(struct pipe_resource**)rbuffer);
|
||||
|
||||
free(tmpPtr);
|
||||
} else {
|
||||
u_upload_data(rctx->uploader, 0, size, ptr, const_offset,
|
||||
u_upload_data(rctx->b.uploader, 0, size, ptr, const_offset,
|
||||
(struct pipe_resource**)rbuffer);
|
||||
}
|
||||
}
|
||||
|
|
|
@ -27,7 +27,7 @@ static struct pipe_resource *r600_resource_create(struct pipe_screen *screen,
|
|||
const struct pipe_resource *templ)
|
||||
{
|
||||
if (templ->target == PIPE_BUFFER) {
|
||||
return si_buffer_create(screen, templ);
|
||||
return r600_buffer_create(screen, templ, 4096);
|
||||
} else {
|
||||
return r600_texture_create(screen, templ);
|
||||
}
|
||||
|
@ -55,7 +55,7 @@ void r600_init_screen_resource_functions(struct pipe_screen *screen)
|
|||
void r600_init_context_resource_functions(struct r600_context *r600)
|
||||
{
|
||||
r600->b.b.transfer_map = u_transfer_map_vtbl;
|
||||
r600->b.b.transfer_flush_region = u_transfer_flush_region_vtbl;
|
||||
r600->b.b.transfer_flush_region = u_default_transfer_flush_region;
|
||||
r600->b.b.transfer_unmap = u_transfer_unmap_vtbl;
|
||||
r600->b.b.transfer_inline_write = u_default_transfer_inline_write;
|
||||
}
|
||||
|
|
|
@ -38,7 +38,7 @@ void r600_translate_index_buffer(struct r600_context *r600,
|
|||
|
||||
switch (ib->index_size) {
|
||||
case 1:
|
||||
u_upload_alloc(r600->uploader, 0, count * 2,
|
||||
u_upload_alloc(r600->b.uploader, 0, count * 2,
|
||||
&out_offset, &out_buffer, &ptr);
|
||||
|
||||
util_shorten_ubyte_elts_to_userptr(
|
||||
|
|
|
@ -119,11 +119,6 @@ static void r600_destroy_context(struct pipe_context *context)
|
|||
|
||||
util_blitter_destroy(rctx->blitter);
|
||||
|
||||
if (rctx->uploader) {
|
||||
u_upload_destroy(rctx->uploader);
|
||||
}
|
||||
util_slab_destroy(&rctx->pool_transfers);
|
||||
|
||||
r600_common_context_cleanup(&rctx->b);
|
||||
FREE(rctx);
|
||||
}
|
||||
|
@ -187,16 +182,6 @@ static struct pipe_context *r600_create_context(struct pipe_screen *screen, void
|
|||
|
||||
rctx->b.ws->cs_set_flush_callback(rctx->b.rings.gfx.cs, r600_flush_from_winsys, rctx);
|
||||
|
||||
util_slab_create(&rctx->pool_transfers,
|
||||
sizeof(struct pipe_transfer), 64,
|
||||
UTIL_SLAB_SINGLETHREADED);
|
||||
|
||||
rctx->uploader = u_upload_create(&rctx->b.b, 1024 * 1024, 256,
|
||||
PIPE_BIND_INDEX_BUFFER |
|
||||
PIPE_BIND_CONSTANT_BUFFER);
|
||||
if (!rctx->uploader)
|
||||
goto fail;
|
||||
|
||||
rctx->blitter = util_blitter_create(&rctx->b.b);
|
||||
if (rctx->blitter == NULL)
|
||||
goto fail;
|
||||
|
|
|
@ -142,9 +142,6 @@ struct r600_context {
|
|||
struct r600_resource *border_color_table;
|
||||
unsigned border_color_offset;
|
||||
|
||||
struct u_upload_mgr *uploader;
|
||||
struct util_slab_mempool pool_transfers;
|
||||
|
||||
unsigned default_ps_gprs, default_vs_gprs;
|
||||
|
||||
/* Below are variables from the old r600_context.
|
||||
|
@ -186,8 +183,6 @@ void r600_decompress_color_textures(struct r600_context *rctx,
|
|||
struct r600_textures_info *textures);
|
||||
|
||||
/* r600_buffer.c */
|
||||
struct pipe_resource *si_buffer_create(struct pipe_screen *screen,
|
||||
const struct pipe_resource *templ);
|
||||
void r600_upload_index_buffer(struct r600_context *rctx,
|
||||
struct pipe_index_buffer *ib, unsigned count);
|
||||
|
||||
|
|
Loading…
Reference in New Issue