nv50/ir: logic ops on half-regs can't take an immediate
There does not appear to be an instruction form for this. Prevent an immediate from being loaded into place. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Pierre Moreau <dev@pmoreau.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9299>
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@ -355,8 +355,11 @@ TargetNV50::insnCanLoad(const Instruction *i, int s,
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ldSize = typeSizeof(ld->dType);
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}
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if (sf == FILE_IMMEDIATE)
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if (sf == FILE_IMMEDIATE) {
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if (ldSize == 2 && (i->op == OP_AND || i->op == OP_OR || i->op == OP_XOR))
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return false;
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return ldSize <= 4;
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}
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// Check if memory access is encodable:
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