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asahi: Use agx_rsrc_offset for linear transfer_map 

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053>
This commit is contained in:
Alyssa Rosenzweig 2021-07-24 13:01:08 -04:00
parent 695fe3897d
commit 7b4eb731f1
1 changed files with 2 additions and 5 deletions
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7
src/gallium/drivers/asahi/agx_pipe.c
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@ -293,7 +293,6 @@ agx_transfer_map(struct pipe_context *pctx,
struct agx_context *ctx = agx_context(pctx);
struct agx_resource *rsrc = agx_resource(resource);
unsigned bytes_per_pixel = util_format_get_blocksize(resource->format);
struct agx_bo *bo = rsrc->bo;
/* Can't map tiled/compressed directly */
if ((usage & PIPE_MAP_DIRECTLY) && rsrc->modifier != DRM_FORMAT_MOD_LINEAR)
@ -334,16 +333,14 @@ agx_transfer_map(struct pipe_context *pctx,
assert (rsrc->modifier == DRM_FORMAT_MOD_LINEAR);
transfer->base.stride = rsrc->slices[level].line_stride;
transfer->base.layer_stride = 0; // TODO
transfer->base.layer_stride = rsrc->array_stride;
/* Be conservative for direct writes */
if ((usage & PIPE_MAP_WRITE) && (usage & PIPE_MAP_DIRECTLY))
BITSET_SET(rsrc->data_valid, level);
return ((uint8_t *) bo->ptr.cpu)
+ rsrc->slices[level].offset
+ transfer->base.box.z * transfer->base.layer_stride
return agx_rsrc_offset(rsrc, level, box->z)
+ transfer->base.box.y * rsrc->slices[level].line_stride
+ transfer->base.box.x * bytes_per_pixel;
}