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radv: don't use fp16 for 8-bit division lowering before GFX9 

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10081>
This commit is contained in:
Rhys Perry 2021-04-07 19:18:09 +01:00 committed by Marge Bot
parent d8f12fd421
commit 723b000d27
1 changed files with 5 additions and 4 deletions
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9
src/amd/vulkan/radv_pipeline.c
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@ -3320,10 +3320,11 @@ radv_create_shaders(struct radv_pipeline *pipeline, struct radv_device *device,
if (!radv_use_llvm_for_stage(device, i))
nir_opt_idiv_const(nir[i], 8);
nir_lower_idiv(nir[i], &(nir_lower_idiv_options){
.imprecise_32bit_lowering = false,
.allow_fp16 = true,
});
nir_lower_idiv(nir[i],
&(nir_lower_idiv_options){
.imprecise_32bit_lowering = false,
.allow_fp16 = device->physical_device->rad_info.chip_class >= GFX9,
});
nir_opt_sink(nir[i], nir_move_load_input | nir_move_const_undef | nir_move_copies);
nir_opt_move(nir[i], nir_move_load_input | nir_move_const_undef | nir_move_copies);