From 723b000d279310d83ef48ff9c5bee51ae89e1ade Mon Sep 17 00:00:00 2001 From: Rhys Perry Date: Wed, 7 Apr 2021 19:18:09 +0100 Subject: [PATCH] radv: don't use fp16 for 8-bit division lowering before GFX9 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Rhys Perry Reviewed-by: Timur Kristóf Part-of: --- src/amd/vulkan/radv_pipeline.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index 614b5598f4e..eef7a2b5947 100644 --- a/src/amd/vulkan/radv_pipeline.c +++ b/src/amd/vulkan/radv_pipeline.c @@ -3320,10 +3320,11 @@ radv_create_shaders(struct radv_pipeline *pipeline, struct radv_device *device, if (!radv_use_llvm_for_stage(device, i)) nir_opt_idiv_const(nir[i], 8); - nir_lower_idiv(nir[i], &(nir_lower_idiv_options){ - .imprecise_32bit_lowering = false, - .allow_fp16 = true, - }); + nir_lower_idiv(nir[i], + &(nir_lower_idiv_options){ + .imprecise_32bit_lowering = false, + .allow_fp16 = device->physical_device->rad_info.chip_class >= GFX9, + }); nir_opt_sink(nir[i], nir_move_load_input | nir_move_const_undef | nir_move_copies); nir_opt_move(nir[i], nir_move_load_input | nir_move_const_undef | nir_move_copies);