ac/surface: allow gfx6-8 to enter the gfx9 DCC codepath for SI_FORCE_FAMILY
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13871>
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@ -1529,6 +1529,11 @@ static bool is_dcc_supported_by_DCN(const struct radeon_info *info,
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return false;
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switch (info->chip_class) {
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case GFX6:
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case GFX7:
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case GFX8:
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/* We can get here due to SI_FORCE_FAMILY. */
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return false;
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case GFX9:
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/* There are more constraints, but we always set
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* INDEPENDENT_64B_BLOCKS = 1 and MAX_COMPRESSED_BLOCK_SIZE = 64B,
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