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ac/surface: allow gfx6-8 to enter the gfx9 DCC codepath for SI_FORCE_FAMILY 

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13871>
This commit is contained in:
Marek Olšák 2021-09-15 15:28:46 -04:00 committed by Marge Bot
parent d830d213b6
commit 694731ac13
1 changed files with 5 additions and 0 deletions
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5
src/amd/common/ac_surface.c
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@ -1529,6 +1529,11 @@ static bool is_dcc_supported_by_DCN(const struct radeon_info *info,
return false;
switch (info->chip_class) {
case GFX6:
case GFX7:
case GFX8:
/* We can get here due to SI_FORCE_FAMILY. */
return false;
case GFX9:
/* There are more constraints, but we always set
* INDEPENDENT_64B_BLOCKS = 1 and MAX_COMPRESSED_BLOCK_SIZE = 64B,