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@ -0,0 +1,657 @@
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/*
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* Copyright © 2016 Dave Airlie
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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#include <assert.h>
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#include <stdbool.h>
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#include "radv_meta.h"
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#include "radv_private.h"
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#include "nir/nir_builder.h"
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#include "sid.h"
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#include "vk_format.h"
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static nir_shader *
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build_nir_vertex_shader(void)
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{
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const struct glsl_type *vec4 = glsl_vec4_type();
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nir_builder b;
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nir_builder_init_simple_shader(&b, NULL, MESA_SHADER_VERTEX, NULL);
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b.shader->info->name = ralloc_strdup(b.shader, "meta_resolve_vs");
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nir_variable *pos_out = nir_variable_create(b.shader, nir_var_shader_out,
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vec4, "gl_Position");
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pos_out->data.location = VARYING_SLOT_POS;
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nir_ssa_def *outvec = radv_meta_gen_rect_vertices(&b);
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nir_store_var(&b, pos_out, outvec, 0xf);
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return b.shader;
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}
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static nir_shader *
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build_resolve_fragment_shader(struct radv_device *dev, bool is_integer, bool is_srgb, int samples)
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{
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nir_builder b;
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char name[64];
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const struct glsl_type *vec2 = glsl_vector_type(GLSL_TYPE_FLOAT, 2);
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const struct glsl_type *vec4 = glsl_vec4_type();
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const struct glsl_type *sampler_type = glsl_sampler_type(GLSL_SAMPLER_DIM_MS,
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false,
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false,
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GLSL_TYPE_FLOAT);
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snprintf(name, 64, "meta_resolve_fs-%d-%s", samples, is_integer ? "int" : (is_srgb ? "srgb" : "float"));
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nir_builder_init_simple_shader(&b, NULL, MESA_SHADER_FRAGMENT, NULL);
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b.shader->info->name = ralloc_strdup(b.shader, name);
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nir_variable *input_img = nir_variable_create(b.shader, nir_var_uniform,
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sampler_type, "s_tex");
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input_img->data.descriptor_set = 0;
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input_img->data.binding = 0;
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nir_variable *fs_pos_in = nir_variable_create(b.shader, nir_var_shader_in, vec2, "fs_pos_in");
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fs_pos_in->data.location = VARYING_SLOT_POS;
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nir_variable *color_out = nir_variable_create(b.shader, nir_var_shader_out,
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vec4, "f_color");
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color_out->data.location = FRAG_RESULT_DATA0;
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nir_ssa_def *pos_in = nir_load_var(&b, fs_pos_in);
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nir_intrinsic_instr *src_offset = nir_intrinsic_instr_create(b.shader, nir_intrinsic_load_push_constant);
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src_offset->src[0] = nir_src_for_ssa(nir_imm_int(&b, 0));
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src_offset->num_components = 2;
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nir_ssa_dest_init(&src_offset->instr, &src_offset->dest, 2, 32, "src_offset");
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nir_builder_instr_insert(&b, &src_offset->instr);
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nir_ssa_def *pos_int = nir_f2i32(&b, pos_in);
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nir_ssa_def *img_coord = nir_channels(&b, nir_iadd(&b, pos_int, &src_offset->dest.ssa), 0x3);
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nir_variable *color = nir_local_variable_create(b.impl, glsl_vec4_type(), "color");
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radv_meta_build_resolve_shader_core(&b, is_integer, is_srgb,samples,
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input_img, color, img_coord);
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nir_ssa_def *outval = nir_load_var(&b, color);
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nir_store_var(&b, color_out, outval, 0xf);
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return b.shader;
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}
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static VkResult
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create_layout(struct radv_device *device)
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{
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VkResult result;
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/*
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* one descriptors for the image being sampled
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*/
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VkDescriptorSetLayoutCreateInfo ds_create_info = {
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.sType = VK_STRUCTURE_TYPE_DESCRIPTOR_SET_LAYOUT_CREATE_INFO,
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.flags = VK_DESCRIPTOR_SET_LAYOUT_CREATE_PUSH_DESCRIPTOR_BIT_KHR,
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.bindingCount = 1,
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.pBindings = (VkDescriptorSetLayoutBinding[]) {
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{
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.binding = 0,
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.descriptorType = VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE,
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.descriptorCount = 1,
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.stageFlags = VK_SHADER_STAGE_FRAGMENT_BIT,
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.pImmutableSamplers = NULL
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},
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}
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};
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result = radv_CreateDescriptorSetLayout(radv_device_to_handle(device),
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&ds_create_info,
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&device->meta_state.alloc,
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&device->meta_state.resolve_fragment.ds_layout);
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if (result != VK_SUCCESS)
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goto fail;
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VkPipelineLayoutCreateInfo pl_create_info = {
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.sType = VK_STRUCTURE_TYPE_PIPELINE_LAYOUT_CREATE_INFO,
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.setLayoutCount = 1,
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.pSetLayouts = &device->meta_state.resolve_fragment.ds_layout,
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.pushConstantRangeCount = 1,
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.pPushConstantRanges = &(VkPushConstantRange){VK_SHADER_STAGE_FRAGMENT_BIT, 0, 8},
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};
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result = radv_CreatePipelineLayout(radv_device_to_handle(device),
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&pl_create_info,
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&device->meta_state.alloc,
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&device->meta_state.resolve_fragment.p_layout);
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if (result != VK_SUCCESS)
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goto fail;
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return VK_SUCCESS;
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fail:
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return result;
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}
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static const VkPipelineVertexInputStateCreateInfo normal_vi_create_info = {
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.sType = VK_STRUCTURE_TYPE_PIPELINE_VERTEX_INPUT_STATE_CREATE_INFO,
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.vertexBindingDescriptionCount = 1,
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.pVertexBindingDescriptions = (VkVertexInputBindingDescription[]) {
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{
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.binding = 0,
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.stride = 2 * sizeof(float),
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.inputRate = VK_VERTEX_INPUT_RATE_VERTEX
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},
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},
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.vertexAttributeDescriptionCount = 1,
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.pVertexAttributeDescriptions = (VkVertexInputAttributeDescription[]) {
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{
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/* Texture Coordinate */
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.location = 0,
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.binding = 0,
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.format = VK_FORMAT_R32G32_SFLOAT,
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.offset = 0
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},
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},
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};
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static VkFormat pipeline_formats[] = {
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VK_FORMAT_R8G8B8A8_UNORM,
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VK_FORMAT_R8G8B8A8_UINT,
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VK_FORMAT_R8G8B8A8_SINT,
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VK_FORMAT_R8G8B8A8_SRGB,
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VK_FORMAT_R16G16B16A16_UNORM,
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VK_FORMAT_R16G16B16A16_SNORM,
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VK_FORMAT_R16G16B16A16_UINT,
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VK_FORMAT_R16G16B16A16_SINT,
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VK_FORMAT_R32_SFLOAT,
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VK_FORMAT_R32G32_SFLOAT,
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VK_FORMAT_R32G32B32A32_SFLOAT
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};
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static VkResult
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create_resolve_pipeline(struct radv_device *device,
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int samples_log2,
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VkFormat format)
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{
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VkResult result;
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bool is_integer = false, is_srgb = false;
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uint32_t samples = 1 << samples_log2;
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unsigned fs_key = radv_format_meta_fs_key(format);
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const VkPipelineVertexInputStateCreateInfo *vi_create_info;
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vi_create_info = &normal_vi_create_info;
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if (vk_format_is_int(format))
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is_integer = true;
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else if (vk_format_is_srgb(format))
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is_srgb = true;
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struct radv_shader_module fs = { .nir = NULL };
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fs.nir = build_resolve_fragment_shader(device, is_integer, is_srgb, samples);
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struct radv_shader_module vs = {
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.nir = build_nir_vertex_shader(),
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};
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/* compute shader */
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VkPipelineShaderStageCreateInfo pipeline_shader_stages[] = {
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{
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.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
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.stage = VK_SHADER_STAGE_VERTEX_BIT,
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.module = radv_shader_module_to_handle(&vs),
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.pName = "main",
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.pSpecializationInfo = NULL
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}, {
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.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
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.stage = VK_SHADER_STAGE_FRAGMENT_BIT,
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.module = radv_shader_module_to_handle(&fs),
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.pName = "main",
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.pSpecializationInfo = NULL
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},
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};
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result = radv_CreateRenderPass(radv_device_to_handle(device),
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&(VkRenderPassCreateInfo) {
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.sType = VK_STRUCTURE_TYPE_RENDER_PASS_CREATE_INFO,
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.attachmentCount = 1,
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.pAttachments = &(VkAttachmentDescription) {
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.format = format,
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.loadOp = VK_ATTACHMENT_LOAD_OP_LOAD,
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.storeOp = VK_ATTACHMENT_STORE_OP_STORE,
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.initialLayout = VK_IMAGE_LAYOUT_GENERAL,
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.finalLayout = VK_IMAGE_LAYOUT_GENERAL,
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},
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.subpassCount = 1,
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.pSubpasses = &(VkSubpassDescription) {
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.pipelineBindPoint = VK_PIPELINE_BIND_POINT_GRAPHICS,
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.inputAttachmentCount = 0,
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.colorAttachmentCount = 1,
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.pColorAttachments = &(VkAttachmentReference) {
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.attachment = 0,
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.layout = VK_IMAGE_LAYOUT_GENERAL,
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},
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.pResolveAttachments = NULL,
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.pDepthStencilAttachment = &(VkAttachmentReference) {
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.attachment = VK_ATTACHMENT_UNUSED,
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.layout = VK_IMAGE_LAYOUT_GENERAL,
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},
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.preserveAttachmentCount = 1,
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.pPreserveAttachments = (uint32_t[]) { 0 },
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},
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.dependencyCount = 0,
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}, &device->meta_state.alloc, &device->meta_state.resolve_fragment.rc[samples_log2].render_pass[fs_key]);
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const VkGraphicsPipelineCreateInfo vk_pipeline_info = {
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.sType = VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO,
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.stageCount = ARRAY_SIZE(pipeline_shader_stages),
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.pStages = pipeline_shader_stages,
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.pVertexInputState = vi_create_info,
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.pInputAssemblyState = &(VkPipelineInputAssemblyStateCreateInfo) {
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.sType = VK_STRUCTURE_TYPE_PIPELINE_INPUT_ASSEMBLY_STATE_CREATE_INFO,
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.topology = VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP,
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.primitiveRestartEnable = false,
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},
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.pViewportState = &(VkPipelineViewportStateCreateInfo) {
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.sType = VK_STRUCTURE_TYPE_PIPELINE_VIEWPORT_STATE_CREATE_INFO,
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.viewportCount = 1,
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.scissorCount = 1,
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},
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.pRasterizationState = &(VkPipelineRasterizationStateCreateInfo) {
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.sType = VK_STRUCTURE_TYPE_PIPELINE_RASTERIZATION_STATE_CREATE_INFO,
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.rasterizerDiscardEnable = false,
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.polygonMode = VK_POLYGON_MODE_FILL,
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.cullMode = VK_CULL_MODE_NONE,
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.frontFace = VK_FRONT_FACE_COUNTER_CLOCKWISE
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},
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.pMultisampleState = &(VkPipelineMultisampleStateCreateInfo) {
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.sType = VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO,
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.rasterizationSamples = 1,
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.sampleShadingEnable = false,
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.pSampleMask = (VkSampleMask[]) { UINT32_MAX },
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},
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.pColorBlendState = &(VkPipelineColorBlendStateCreateInfo) {
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.sType = VK_STRUCTURE_TYPE_PIPELINE_COLOR_BLEND_STATE_CREATE_INFO,
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.attachmentCount = 1,
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|
|
.pAttachments = (VkPipelineColorBlendAttachmentState []) {
|
|
|
|
|
{ .colorWriteMask =
|
|
|
|
|
VK_COLOR_COMPONENT_A_BIT |
|
|
|
|
|
VK_COLOR_COMPONENT_R_BIT |
|
|
|
|
|
VK_COLOR_COMPONENT_G_BIT |
|
|
|
|
|
VK_COLOR_COMPONENT_B_BIT },
|
|
|
|
|
}
|
|
|
|
|
},
|
|
|
|
|
.pDynamicState = &(VkPipelineDynamicStateCreateInfo) {
|
|
|
|
|
.sType = VK_STRUCTURE_TYPE_PIPELINE_DYNAMIC_STATE_CREATE_INFO,
|
|
|
|
|
.dynamicStateCount = 9,
|
|
|
|
|
.pDynamicStates = (VkDynamicState[]) {
|
|
|
|
|
VK_DYNAMIC_STATE_VIEWPORT,
|
|
|
|
|
VK_DYNAMIC_STATE_SCISSOR,
|
|
|
|
|
VK_DYNAMIC_STATE_LINE_WIDTH,
|
|
|
|
|
VK_DYNAMIC_STATE_DEPTH_BIAS,
|
|
|
|
|
VK_DYNAMIC_STATE_BLEND_CONSTANTS,
|
|
|
|
|
VK_DYNAMIC_STATE_DEPTH_BOUNDS,
|
|
|
|
|
VK_DYNAMIC_STATE_STENCIL_COMPARE_MASK,
|
|
|
|
|
VK_DYNAMIC_STATE_STENCIL_WRITE_MASK,
|
|
|
|
|
VK_DYNAMIC_STATE_STENCIL_REFERENCE,
|
|
|
|
|
},
|
|
|
|
|
},
|
|
|
|
|
.flags = 0,
|
|
|
|
|
.layout = device->meta_state.resolve_fragment.p_layout,
|
|
|
|
|
.renderPass = device->meta_state.resolve_fragment.rc[samples_log2].render_pass[fs_key],
|
|
|
|
|
.subpass = 0,
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
const struct radv_graphics_pipeline_create_info radv_pipeline_info = {
|
|
|
|
|
.use_rectlist = true
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
result = radv_graphics_pipeline_create(radv_device_to_handle(device),
|
|
|
|
|
radv_pipeline_cache_to_handle(&device->meta_state.cache),
|
|
|
|
|
&vk_pipeline_info, &radv_pipeline_info,
|
|
|
|
|
&device->meta_state.alloc,
|
|
|
|
|
&device->meta_state.resolve_fragment.rc[samples_log2].pipeline[fs_key]);
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
ralloc_free(vs.nir);
|
|
|
|
|
ralloc_free(fs.nir);
|
|
|
|
|
if (result != VK_SUCCESS)
|
|
|
|
|
goto fail;
|
|
|
|
|
|
|
|
|
|
return VK_SUCCESS;
|
|
|
|
|
fail:
|
|
|
|
|
ralloc_free(vs.nir);
|
|
|
|
|
ralloc_free(fs.nir);
|
|
|
|
|
return result;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
VkResult
|
|
|
|
|
radv_device_init_meta_resolve_fragment_state(struct radv_device *device)
|
|
|
|
|
{
|
|
|
|
|
struct radv_meta_state *state = &device->meta_state;
|
|
|
|
|
VkResult res;
|
|
|
|
|
memset(&state->resolve_fragment, 0, sizeof(state->resolve_fragment));
|
|
|
|
|
|
|
|
|
|
res = create_layout(device);
|
|
|
|
|
if (res != VK_SUCCESS)
|
|
|
|
|
return res;
|
|
|
|
|
|
|
|
|
|
for (uint32_t i = 0; i < MAX_SAMPLES_LOG2; ++i) {
|
|
|
|
|
for (unsigned j = 0; j < ARRAY_SIZE(pipeline_formats); ++j) {
|
|
|
|
|
res = create_resolve_pipeline(device, i, pipeline_formats[j]);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return res;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
radv_device_finish_meta_resolve_fragment_state(struct radv_device *device)
|
|
|
|
|
{
|
|
|
|
|
struct radv_meta_state *state = &device->meta_state;
|
|
|
|
|
for (uint32_t i = 0; i < MAX_SAMPLES_LOG2; ++i) {
|
|
|
|
|
for (unsigned j = 0; j < NUM_META_FS_KEYS; ++j) {
|
|
|
|
|
radv_DestroyRenderPass(radv_device_to_handle(device),
|
|
|
|
|
state->resolve_fragment.rc[i].render_pass[j],
|
|
|
|
|
&state->alloc);
|
|
|
|
|
radv_DestroyPipeline(radv_device_to_handle(device),
|
|
|
|
|
state->resolve_fragment.rc[i].pipeline[j],
|
|
|
|
|
&state->alloc);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
radv_DestroyDescriptorSetLayout(radv_device_to_handle(device),
|
|
|
|
|
state->resolve_fragment.ds_layout,
|
|
|
|
|
&state->alloc);
|
|
|
|
|
radv_DestroyPipelineLayout(radv_device_to_handle(device),
|
|
|
|
|
state->resolve_fragment.p_layout,
|
|
|
|
|
&state->alloc);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
emit_resolve(struct radv_cmd_buffer *cmd_buffer,
|
|
|
|
|
struct radv_image_view *src_iview,
|
|
|
|
|
const VkOffset2D *src_offset,
|
|
|
|
|
const VkOffset2D *dest_offset,
|
|
|
|
|
const VkExtent2D *resolve_extent)
|
|
|
|
|
{
|
|
|
|
|
struct radv_device *device = cmd_buffer->device;
|
|
|
|
|
VkCommandBuffer cmd_buffer_h = radv_cmd_buffer_to_handle(cmd_buffer);
|
|
|
|
|
const uint32_t samples = src_iview->image->info.samples;
|
|
|
|
|
const uint32_t samples_log2 = ffs(samples) - 1;
|
|
|
|
|
radv_meta_push_descriptor_set(cmd_buffer,
|
|
|
|
|
VK_PIPELINE_BIND_POINT_GRAPHICS,
|
|
|
|
|
cmd_buffer->device->meta_state.resolve_fragment.p_layout,
|
|
|
|
|
0, /* set */
|
|
|
|
|
1, /* descriptorWriteCount */
|
|
|
|
|
(VkWriteDescriptorSet[]) {
|
|
|
|
|
{
|
|
|
|
|
.sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET,
|
|
|
|
|
.dstBinding = 0,
|
|
|
|
|
.dstArrayElement = 0,
|
|
|
|
|
.descriptorCount = 1,
|
|
|
|
|
.descriptorType = VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE,
|
|
|
|
|
.pImageInfo = (VkDescriptorImageInfo[]) {
|
|
|
|
|
{
|
|
|
|
|
.sampler = VK_NULL_HANDLE,
|
|
|
|
|
.imageView = radv_image_view_to_handle(src_iview),
|
|
|
|
|
.imageLayout = VK_IMAGE_LAYOUT_GENERAL,
|
|
|
|
|
},
|
|
|
|
|
}
|
|
|
|
|
},
|
|
|
|
|
});
|
|
|
|
|
|
|
|
|
|
cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_CB;
|
|
|
|
|
|
|
|
|
|
unsigned push_constants[2] = {
|
|
|
|
|
src_offset->x,
|
|
|
|
|
src_offset->y,
|
|
|
|
|
};
|
|
|
|
|
radv_CmdPushConstants(radv_cmd_buffer_to_handle(cmd_buffer),
|
|
|
|
|
device->meta_state.resolve_fragment.p_layout,
|
|
|
|
|
VK_SHADER_STAGE_FRAGMENT_BIT, 0, 8,
|
|
|
|
|
push_constants);
|
|
|
|
|
|
|
|
|
|
unsigned fs_key = radv_format_meta_fs_key(src_iview->vk_format);
|
|
|
|
|
VkPipeline pipeline_h = device->meta_state.resolve_fragment.rc[samples_log2].pipeline[fs_key];
|
|
|
|
|
|
|
|
|
|
radv_CmdBindPipeline(cmd_buffer_h, VK_PIPELINE_BIND_POINT_GRAPHICS,
|
|
|
|
|
pipeline_h);
|
|
|
|
|
|
|
|
|
|
radv_CmdSetViewport(radv_cmd_buffer_to_handle(cmd_buffer), 0, 1, &(VkViewport) {
|
|
|
|
|
.x = dest_offset->x,
|
|
|
|
|
.y = dest_offset->y,
|
|
|
|
|
.width = resolve_extent->width,
|
|
|
|
|
.height = resolve_extent->height,
|
|
|
|
|
.minDepth = 0.0f,
|
|
|
|
|
.maxDepth = 1.0f
|
|
|
|
|
});
|
|
|
|
|
|
|
|
|
|
radv_CmdSetScissor(radv_cmd_buffer_to_handle(cmd_buffer), 0, 1, &(VkRect2D) {
|
|
|
|
|
.offset = *dest_offset,
|
|
|
|
|
.extent = *resolve_extent,
|
|
|
|
|
});
|
|
|
|
|
|
|
|
|
|
radv_CmdDraw(cmd_buffer_h, 3, 1, 0, 0);
|
|
|
|
|
cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_CB;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void radv_meta_resolve_fragment_image(struct radv_cmd_buffer *cmd_buffer,
|
|
|
|
|
struct radv_image *src_image,
|
|
|
|
|
VkImageLayout src_image_layout,
|
|
|
|
|
struct radv_image *dest_image,
|
|
|
|
|
VkImageLayout dest_image_layout,
|
|
|
|
|
uint32_t region_count,
|
|
|
|
|
const VkImageResolve *regions)
|
|
|
|
|
{
|
|
|
|
|
struct radv_device *device = cmd_buffer->device;
|
|
|
|
|
struct radv_meta_saved_state saved_state;
|
|
|
|
|
const uint32_t samples = src_image->info.samples;
|
|
|
|
|
const uint32_t samples_log2 = ffs(samples) - 1;
|
|
|
|
|
unsigned fs_key = radv_format_meta_fs_key(dest_image->vk_format);
|
|
|
|
|
for (uint32_t r = 0; r < region_count; ++r) {
|
|
|
|
|
const VkImageResolve *region = ®ions[r];
|
|
|
|
|
const uint32_t src_base_layer =
|
|
|
|
|
radv_meta_get_iview_layer(src_image, ®ion->srcSubresource,
|
|
|
|
|
®ion->srcOffset);
|
|
|
|
|
VkImageSubresourceRange range;
|
|
|
|
|
range.aspectMask = VK_IMAGE_ASPECT_COLOR_BIT;
|
|
|
|
|
range.baseMipLevel = region->srcSubresource.mipLevel;
|
|
|
|
|
range.levelCount = 1;
|
|
|
|
|
range.baseArrayLayer = src_base_layer;
|
|
|
|
|
range.layerCount = region->srcSubresource.layerCount;
|
|
|
|
|
radv_fast_clear_flush_image_inplace(cmd_buffer, src_image, &range);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
radv_meta_save_graphics_reset_vport_scissor_novertex(&saved_state, cmd_buffer);
|
|
|
|
|
|
|
|
|
|
for (uint32_t r = 0; r < region_count; ++r) {
|
|
|
|
|
const VkImageResolve *region = ®ions[r];
|
|
|
|
|
|
|
|
|
|
assert(region->srcSubresource.aspectMask == VK_IMAGE_ASPECT_COLOR_BIT);
|
|
|
|
|
assert(region->dstSubresource.aspectMask == VK_IMAGE_ASPECT_COLOR_BIT);
|
|
|
|
|
assert(region->srcSubresource.layerCount == region->dstSubresource.layerCount);
|
|
|
|
|
|
|
|
|
|
const uint32_t src_base_layer =
|
|
|
|
|
radv_meta_get_iview_layer(src_image, ®ion->srcSubresource,
|
|
|
|
|
®ion->srcOffset);
|
|
|
|
|
|
|
|
|
|
const uint32_t dest_base_layer =
|
|
|
|
|
radv_meta_get_iview_layer(dest_image, ®ion->dstSubresource,
|
|
|
|
|
®ion->dstOffset);
|
|
|
|
|
|
|
|
|
|
const struct VkExtent3D extent =
|
|
|
|
|
radv_sanitize_image_extent(src_image->type, region->extent);
|
|
|
|
|
const struct VkOffset3D srcOffset =
|
|
|
|
|
radv_sanitize_image_offset(src_image->type, region->srcOffset);
|
|
|
|
|
const struct VkOffset3D dstOffset =
|
|
|
|
|
radv_sanitize_image_offset(dest_image->type, region->dstOffset);
|
|
|
|
|
|
|
|
|
|
for (uint32_t layer = 0; layer < region->srcSubresource.layerCount;
|
|
|
|
|
++layer) {
|
|
|
|
|
|
|
|
|
|
struct radv_image_view src_iview;
|
|
|
|
|
radv_image_view_init(&src_iview, cmd_buffer->device,
|
|
|
|
|
&(VkImageViewCreateInfo) {
|
|
|
|
|
.sType = VK_STRUCTURE_TYPE_IMAGE_VIEW_CREATE_INFO,
|
|
|
|
|
.image = radv_image_to_handle(src_image),
|
|
|
|
|
.viewType = radv_meta_get_view_type(src_image),
|
|
|
|
|
.format = src_image->vk_format,
|
|
|
|
|
.subresourceRange = {
|
|
|
|
|
.aspectMask = VK_IMAGE_ASPECT_COLOR_BIT,
|
|
|
|
|
.baseMipLevel = region->srcSubresource.mipLevel,
|
|
|
|
|
.levelCount = 1,
|
|
|
|
|
.baseArrayLayer = src_base_layer + layer,
|
|
|
|
|
.layerCount = 1,
|
|
|
|
|
},
|
|
|
|
|
},
|
|
|
|
|
cmd_buffer, VK_IMAGE_USAGE_SAMPLED_BIT);
|
|
|
|
|
|
|
|
|
|
struct radv_image_view dest_iview;
|
|
|
|
|
radv_image_view_init(&dest_iview, cmd_buffer->device,
|
|
|
|
|
&(VkImageViewCreateInfo) {
|
|
|
|
|
.sType = VK_STRUCTURE_TYPE_IMAGE_VIEW_CREATE_INFO,
|
|
|
|
|
.image = radv_image_to_handle(dest_image),
|
|
|
|
|
.viewType = radv_meta_get_view_type(dest_image),
|
|
|
|
|
.format = dest_image->vk_format,
|
|
|
|
|
.subresourceRange = {
|
|
|
|
|
.aspectMask = VK_IMAGE_ASPECT_COLOR_BIT,
|
|
|
|
|
.baseMipLevel = region->dstSubresource.mipLevel,
|
|
|
|
|
.levelCount = 1,
|
|
|
|
|
.baseArrayLayer = dest_base_layer + layer,
|
|
|
|
|
.layerCount = 1,
|
|
|
|
|
},
|
|
|
|
|
},
|
|
|
|
|
cmd_buffer, VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT);
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
VkFramebuffer fb;
|
|
|
|
|
radv_CreateFramebuffer(radv_device_to_handle(cmd_buffer->device),
|
|
|
|
|
&(VkFramebufferCreateInfo) {
|
|
|
|
|
.sType = VK_STRUCTURE_TYPE_FRAMEBUFFER_CREATE_INFO,
|
|
|
|
|
.attachmentCount = 1,
|
|
|
|
|
.pAttachments = (VkImageView[]) {
|
|
|
|
|
radv_image_view_to_handle(&dest_iview),
|
|
|
|
|
},
|
|
|
|
|
.width = extent.width,
|
|
|
|
|
.height = extent.height,
|
|
|
|
|
.layers = 1
|
|
|
|
|
}, &cmd_buffer->pool->alloc, &fb);
|
|
|
|
|
|
|
|
|
|
radv_CmdBeginRenderPass(radv_cmd_buffer_to_handle(cmd_buffer),
|
|
|
|
|
&(VkRenderPassBeginInfo) {
|
|
|
|
|
.sType = VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO,
|
|
|
|
|
.renderPass = device->meta_state.resolve_fragment.rc[samples_log2].render_pass[fs_key],
|
|
|
|
|
.framebuffer = fb,
|
|
|
|
|
.renderArea = {
|
|
|
|
|
.offset = { dstOffset.x, dstOffset.y, },
|
|
|
|
|
.extent = { extent.width, extent.height },
|
|
|
|
|
},
|
|
|
|
|
.clearValueCount = 0,
|
|
|
|
|
.pClearValues = NULL,
|
|
|
|
|
}, VK_SUBPASS_CONTENTS_INLINE);
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
emit_resolve(cmd_buffer,
|
|
|
|
|
&src_iview,
|
|
|
|
|
&(VkOffset2D) { srcOffset.x, srcOffset.y },
|
|
|
|
|
&(VkOffset2D) { dstOffset.x, dstOffset.y },
|
|
|
|
|
&(VkExtent2D) { extent.width, extent.height });
|
|
|
|
|
|
|
|
|
|
radv_CmdEndRenderPass(radv_cmd_buffer_to_handle(cmd_buffer));
|
|
|
|
|
|
|
|
|
|
radv_DestroyFramebuffer(radv_device_to_handle(cmd_buffer->device), fb, &cmd_buffer->pool->alloc);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
radv_meta_restore(&saved_state, cmd_buffer);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/**
|
|
|
|
|
* Emit any needed resolves for the current subpass.
|
|
|
|
|
*/
|
|
|
|
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void
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radv_cmd_buffer_resolve_subpass_fs(struct radv_cmd_buffer *cmd_buffer)
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{
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struct radv_framebuffer *fb = cmd_buffer->state.framebuffer;
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const struct radv_subpass *subpass = cmd_buffer->state.subpass;
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struct radv_meta_saved_state saved_state;
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/* FINISHME(perf): Skip clears for resolve attachments.
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*
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* From the Vulkan 1.0 spec:
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*
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* If the first use of an attachment in a render pass is as a resolve
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* attachment, then the loadOp is effectively ignored as the resolve is
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* guaranteed to overwrite all pixels in the render area.
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*/
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if (!subpass->has_resolve)
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return;
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radv_meta_save_graphics_reset_vport_scissor(&saved_state, cmd_buffer);
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for (uint32_t i = 0; i < subpass->color_count; ++i) {
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VkAttachmentReference src_att = subpass->color_attachments[i];
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VkAttachmentReference dest_att = subpass->resolve_attachments[i];
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struct radv_image *dst_img = cmd_buffer->state.framebuffer->attachments[dest_att.attachment].attachment->image;
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struct radv_image_view *src_iview = cmd_buffer->state.framebuffer->attachments[src_att.attachment].attachment;
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if (dest_att.attachment == VK_ATTACHMENT_UNUSED)
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continue;
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if (dst_img->surface.dcc_size) {
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radv_initialize_dcc(cmd_buffer, dst_img, 0xffffffff);
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cmd_buffer->state.attachments[dest_att.attachment].current_layout = VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL;
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}
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{
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VkImageSubresourceRange range;
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range.aspectMask = VK_IMAGE_ASPECT_COLOR_BIT;
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range.baseMipLevel = 0;
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range.levelCount = 1;
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range.baseArrayLayer = 0;
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range.layerCount = 1;
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radv_fast_clear_flush_image_inplace(cmd_buffer, src_iview->image, &range);
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}
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struct radv_subpass resolve_subpass = {
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.color_count = 1,
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.color_attachments = (VkAttachmentReference[]) { dest_att },
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.depth_stencil_attachment = { .attachment = VK_ATTACHMENT_UNUSED },
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};
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radv_cmd_buffer_set_subpass(cmd_buffer, &resolve_subpass, false);
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/* Subpass resolves must respect the render area. We can ignore the
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* render area here because vkCmdBeginRenderPass set the render area
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* with 3DSTATE_DRAWING_RECTANGLE.
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*
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* XXX(chadv): Does the hardware really respect
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* 3DSTATE_DRAWING_RECTANGLE when draing a 3DPRIM_RECTLIST?
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*/
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emit_resolve(cmd_buffer,
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src_iview,
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&(VkOffset2D) { 0, 0 },
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&(VkOffset2D) { 0, 0 },
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&(VkExtent2D) { fb->width, fb->height });
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}
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cmd_buffer->state.subpass = subpass;
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radv_meta_restore(&saved_state, cmd_buffer);
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}
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