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cell: Fixed bug with absolute, negate, set-negative logic in source fetch for TGSI instructions. The logic should operate on the origin channel not the swizzled channel. 

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Jonathan White 2008-09-22 14:33:53 -06:00
parent 6b3ec9ec2b
commit 6642380841
1 changed files with 5 additions and 9 deletions
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14
src/gallium/drivers/cell/ppu/cell_gen_fp.c
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@ -184,31 +184,27 @@ get_src_reg(struct codegen *gen,
assert(swizzle >= TGSI_SWIZZLE_X);
assert(swizzle <= TGSI_EXTSWIZZLE_ONE);
channel = swizzle;
switch (src->SrcRegister.File) {
case TGSI_FILE_TEMPORARY:
reg = gen->temp_regs[src->SrcRegister.Index][channel];
reg = gen->temp_regs[src->SrcRegister.Index][swizzle];
break;
case TGSI_FILE_INPUT:
{
if(channel == TGSI_EXTSWIZZLE_ONE)
if(swizzle == TGSI_EXTSWIZZLE_ONE)
{
/* Load const one float and early out */
reg = get_const_one_reg(gen);
return reg;
}
else if(channel == TGSI_EXTSWIZZLE_ZERO)
else if(swizzle == TGSI_EXTSWIZZLE_ZERO)
{
/* Load const zero float and early out */
reg = get_itemp(gen);
spe_xor(gen->f, reg, reg, reg);
return reg;
}
else
{
/* offset is measured in quadwords, not bytes */
int offset = src->SrcRegister.Index * 4 + channel;
int offset = src->SrcRegister.Index * 4 + swizzle;
reg = get_itemp(gen);
reg_is_itemp = TRUE;
/* Load: reg = memory[(machine_reg) + offset] */
@ -217,7 +213,7 @@ get_src_reg(struct codegen *gen,
}
break;
case TGSI_FILE_IMMEDIATE:
reg = gen->imm_regs[src->SrcRegister.Index][channel];
reg = gen->imm_regs[src->SrcRegister.Index][swizzle];
break;
case TGSI_FILE_CONSTANT:
/* xxx fall-through for now / fix */