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R6xx/r7xx: add some missing state regs

This commit is contained in:
Alex Deucher 2009-07-17 12:07:15 -04:00
parent 6f63698d26
commit 60d681f367
2 changed files with 28 additions and 23 deletions
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45
src/mesa/drivers/dri/r600/r700_chip.c
View File

@ -75,6 +75,8 @@ GLboolean r700InitChipObject(context_t *context)
LINK_STATES(DB_HTILE_DATA_BASE);
LINK_STATES(DB_STENCIL_CLEAR);
LINK_STATES(DB_DEPTH_CLEAR);
LINK_STATES(DB_STENCILREFMASK);
LINK_STATES(DB_STENCILREFMASK_BF);
LINK_STATES(DB_DEPTH_CONTROL);
LINK_STATES(DB_SHADER_CONTROL);
LINK_STATES(DB_RENDER_CONTROL);
@ -120,6 +122,7 @@ GLboolean r700InitChipObject(context_t *context)
LINK_STATES(PA_SU_POLY_OFFSET_FRONT_SCALE);
LINK_STATES(PA_SU_POLY_OFFSET_FRONT_OFFSET);
LINK_STATES(PA_SU_POLY_OFFSET_BACK_SCALE);
LINK_STATES(PA_SU_POLY_OFFSET_BACK_OFFSET);
// CL
LINK_STATES(PA_CL_CLIP_CNTL);
@ -184,17 +187,17 @@ GLboolean r700InitChipObject(context_t *context)
LINK_STATES(VGT_REUSE_OFF);
LINK_STATES(VGT_VTX_CNT_EN);
LINK_STATES(VGT_STRMOUT_BUFFER_EN);
LINK_STATES(SQ_VTX_SEMANTIC_0);
LINK_STATES(SQ_VTX_SEMANTIC_1);
LINK_STATES(SQ_VTX_SEMANTIC_2);
LINK_STATES(SQ_VTX_SEMANTIC_3);
LINK_STATES(SQ_VTX_SEMANTIC_4);
LINK_STATES(SQ_VTX_SEMANTIC_5);
LINK_STATES(SQ_VTX_SEMANTIC_6);
LINK_STATES(SQ_VTX_SEMANTIC_7);
LINK_STATES(SQ_VTX_SEMANTIC_8);
LINK_STATES(SQ_VTX_SEMANTIC_9);
LINK_STATES(SQ_VTX_SEMANTIC_1);
LINK_STATES(SQ_VTX_SEMANTIC_2);
LINK_STATES(SQ_VTX_SEMANTIC_3);
LINK_STATES(SQ_VTX_SEMANTIC_4);
LINK_STATES(SQ_VTX_SEMANTIC_5);
LINK_STATES(SQ_VTX_SEMANTIC_6);
LINK_STATES(SQ_VTX_SEMANTIC_7);
LINK_STATES(SQ_VTX_SEMANTIC_8);
LINK_STATES(SQ_VTX_SEMANTIC_9);
LINK_STATES(SQ_VTX_SEMANTIC_10);
LINK_STATES(SQ_VTX_SEMANTIC_11);
LINK_STATES(SQ_VTX_SEMANTIC_12);
@ -217,7 +220,7 @@ GLboolean r700InitChipObject(context_t *context)
LINK_STATES(SQ_VTX_SEMANTIC_29);
LINK_STATES(SQ_VTX_SEMANTIC_30);
LINK_STATES(SQ_VTX_SEMANTIC_31);
// SPI
LINK_STATES(SPI_VS_OUT_ID_0);
LINK_STATES(SPI_VS_OUT_ID_1);
@ -230,16 +233,16 @@ GLboolean r700InitChipObject(context_t *context)
LINK_STATES(SPI_VS_OUT_ID_8);
LINK_STATES(SPI_VS_OUT_ID_9);
LINK_STATES(SPI_PS_INPUT_CNTL_0);
LINK_STATES(SPI_PS_INPUT_CNTL_1);
LINK_STATES(SPI_PS_INPUT_CNTL_2);
LINK_STATES(SPI_PS_INPUT_CNTL_3);
LINK_STATES(SPI_PS_INPUT_CNTL_0);
LINK_STATES(SPI_PS_INPUT_CNTL_1);
LINK_STATES(SPI_PS_INPUT_CNTL_2);
LINK_STATES(SPI_PS_INPUT_CNTL_3);
LINK_STATES(SPI_PS_INPUT_CNTL_4);
LINK_STATES(SPI_PS_INPUT_CNTL_5);
LINK_STATES(SPI_PS_INPUT_CNTL_6);
LINK_STATES(SPI_PS_INPUT_CNTL_7);
LINK_STATES(SPI_PS_INPUT_CNTL_8);
LINK_STATES(SPI_PS_INPUT_CNTL_9);
LINK_STATES(SPI_PS_INPUT_CNTL_5);
LINK_STATES(SPI_PS_INPUT_CNTL_6);
LINK_STATES(SPI_PS_INPUT_CNTL_7);
LINK_STATES(SPI_PS_INPUT_CNTL_8);
LINK_STATES(SPI_PS_INPUT_CNTL_9);
LINK_STATES(SPI_PS_INPUT_CNTL_10);
LINK_STATES(SPI_PS_INPUT_CNTL_11);
LINK_STATES(SPI_PS_INPUT_CNTL_12);
@ -262,7 +265,7 @@ GLboolean r700InitChipObject(context_t *context)
LINK_STATES(SPI_PS_INPUT_CNTL_29);
LINK_STATES(SPI_PS_INPUT_CNTL_30);
LINK_STATES(SPI_PS_INPUT_CNTL_31);
LINK_STATES(SPI_VS_OUT_CONFIG);
LINK_STATES(SPI_THREAD_GROUPING);
LINK_STATES(SPI_PS_IN_CONTROL_0);

6
src/mesa/drivers/dri/r600/r700_chip.h
View File

@ -284,6 +284,8 @@ typedef struct _R700_CHIP_CONTEXT
union UINT_FLOAT DB_HTILE_DATA_BASE ; /* 0xA005 */
union UINT_FLOAT DB_STENCIL_CLEAR ; /* 0xA00A */
union UINT_FLOAT DB_DEPTH_CLEAR ; /* 0xA00B */
union UINT_FLOAT DB_STENCILREFMASK ; /* 0xA10C */
union UINT_FLOAT DB_STENCILREFMASK_BF ; /* 0xA10D */
union UINT_FLOAT DB_RENDER_CONTROL ; /* 0xA343 */
union UINT_FLOAT DB_RENDER_OVERRIDE ; /* 0xA344 */
union UINT_FLOAT DB_HTILE_SURFACE ; /* 0xA349 */
@ -452,11 +454,11 @@ typedef struct _R700_CHIP_CONTEXT
union UINT_FLOAT SQ_VTX_SEMANTIC_29 ; /* 0xA0FD */
union UINT_FLOAT SQ_VTX_SEMANTIC_30 ; /* 0xA0FE */
union UINT_FLOAT SQ_VTX_SEMANTIC_31 ; /* 0xA0FF */
union UINT_FLOAT SPI_PS_INPUT_CNTL_0 ; /* 0xA191 */
union UINT_FLOAT SPI_PS_INPUT_CNTL_1 ; /* 0xA192 */
union UINT_FLOAT SPI_PS_INPUT_CNTL_2 ; /* 0xA193 */
union UINT_FLOAT SPI_PS_INPUT_CNTL_3 ; /* 0xA194 */
union UINT_FLOAT SPI_PS_INPUT_CNTL_3 ; /* 0xA194 */
union UINT_FLOAT SPI_PS_INPUT_CNTL_4 ; /* 0xA195 */
union UINT_FLOAT SPI_PS_INPUT_CNTL_5 ; /* 0xA196 */
union UINT_FLOAT SPI_PS_INPUT_CNTL_6 ; /* 0xA197 */