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freedreno/ir3: Add new LDLW/STLW instructions 

These access memory used for passing data between geometry stages.

Signed-off-by: Kristian H. Kristensen <hoegsberg@google.com>
This commit is contained in:
Kristian H. Kristensen 2019-10-10 15:09:49 -07:00
parent 956d319446
commit 436d125adf
4 changed files with 8 additions and 3 deletions
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4
src/freedreno/ir3/ir3.c
View File

@ -793,7 +793,7 @@ static int emit_cat6(struct ir3_instruction *instr, void *ptr,
return 0;
} else if (instr->cat6.src_offset || (instr->opc == OPC_LDG) ||
(instr->opc == OPC_LDL)) {
(instr->opc == OPC_LDL) || (instr->opc == OPC_LDLW)) {
struct ir3_register *src3 = instr->regs[3];
instr_cat6a_t *cat6a = ptr;
@ -823,7 +823,7 @@ static int emit_cat6(struct ir3_instruction *instr, void *ptr,
}
if (instr->cat6.dst_offset || (instr->opc == OPC_STG) ||
(instr->opc == OPC_STL)) {
(instr->opc == OPC_STL) || (instr->opc == OPC_STLW)) {
instr_cat6c_t *cat6c = ptr;
cat6->dst_off = true;
cat6c->dst = reg(dst, info, instr->repeat, IR3_REG_R | IR3_REG_HALF);

2
src/freedreno/ir3/ir3.h
View File

@ -1409,8 +1409,10 @@ ir3_SAM(struct ir3_block *block, opc_t opc, type_t type,
INSTR2(LDLV)
INSTR3(LDG)
INSTR3(LDL)
INSTR3(LDLW)
INSTR3(STG)
INSTR3(STL)
INSTR3(STLW)
INSTR1(RESINFO)
INSTR1(RESFMT)
INSTR2(ATOMIC_ADD)

3
src/freedreno/ir3/ir3_cp.c
View File

@ -216,6 +216,9 @@ static bool valid_flags(struct ir3_instruction *instr, unsigned n,
if ((instr->opc == OPC_STL) && (n != 2))
return false;
if (instr->opc == OPC_STLW && n == 0)
return false;
/* disallow CP into anything but the SSBO slot argument for
* atomics:
*/

2
src/freedreno/ir3/ir3_legalize.c
View File

@ -248,7 +248,7 @@ legalize_block(struct ir3_legalize_ctx *ctx, struct ir3_block *block)
/* seems like ldlv needs (ss) bit instead?? which is odd but
* makes a bunch of flat-varying tests start working on a4xx.
*/
if ((n->opc == OPC_LDLV) || (n->opc == OPC_LDL))
if ((n->opc == OPC_LDLV) || (n->opc == OPC_LDL) || (n->opc == OPC_LDLW))
regmask_set(&state->needs_ss, n->regs[0]);
else
regmask_set(&state->needs_sy, n->regs[0]);