ac/surface: allow displayable DCC with any resolution (e.g. 8K)
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14529>
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@ -1490,6 +1490,12 @@ static bool gfx10_DCN_requires_independent_64B_blocks(const struct radeon_info *
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void ac_modifier_max_extent(const struct radeon_info *info,
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uint64_t modifier, uint32_t *width, uint32_t *height)
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{
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/* DCC is supported with any size. The maximum width per display pipe is 5760, but multiple
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* display pipes can be used to drive the display.
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*/
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*width = 16384;
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*height = 16384;
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if (ac_modifier_has_dcc(modifier)) {
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bool independent_64B_blocks = AMD_FMT_MOD_GET(DCC_INDEPENDENT_64B, modifier);
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@ -1497,15 +1503,7 @@ void ac_modifier_max_extent(const struct radeon_info *info,
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/* For 4K, DCN requires INDEPENDENT_64B_BLOCKS = 1 and MAX_COMPRESSED_BLOCK_SIZE = 64B. */
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*width = 2560;
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*height = 2560;
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} else {
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/* DCC is not supported on surfaces above resolutions af 5760. */
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*width = 5760;
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*height = 5760;
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}
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} else {
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/* Non-dcc modifiers */
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*width = 16384;
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*height = 16384;
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}
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}
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@ -1525,10 +1523,6 @@ static bool is_dcc_supported_by_DCN(const struct radeon_info *info,
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if (info->use_display_dcc_unaligned && (rb_aligned || pipe_aligned))
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return false;
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/* Big resolutions don't support DCC. */
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if (config->info.width > 5760 || config->info.height > 5760)
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return false;
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switch (info->chip_class) {
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case GFX6:
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case GFX7:
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