radeonsi/gfx10: disable LATE_ALLOC_GS on Navi14
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
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@ -5545,6 +5545,7 @@ static void si_init_config(struct si_context *sctx)
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late_alloc_limit = (num_cu_per_sh - 2) * 4;
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}
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unsigned late_alloc_limit_gs = late_alloc_limit;
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unsigned cu_mask_vs = 0xffff;
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unsigned cu_mask_gs = 0xffff;
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@ -5558,6 +5559,12 @@ static void si_init_config(struct si_context *sctx)
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}
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}
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/* Don't use late alloc for NGG on Navi14 due to a hw bug. */
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if (sctx->family == CHIP_NAVI14) {
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late_alloc_limit_gs = 0;
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cu_mask_gs = 0xffff;
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}
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/* VS can't execute on one CU if the limit is > 2. */
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si_pm4_set_reg(pm4, R_00B118_SPI_SHADER_PGM_RSRC3_VS,
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S_00B118_CU_EN(cu_mask_vs) |
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@ -5571,7 +5578,7 @@ static void si_init_config(struct si_context *sctx)
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if (sctx->chip_class >= GFX10) {
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si_pm4_set_reg(pm4, R_00B204_SPI_SHADER_PGM_RSRC4_GS,
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S_00B204_CU_EN(0xffff) |
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S_00B204_SPI_SHADER_LATE_ALLOC_GS_GFX10(late_alloc_limit));
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S_00B204_SPI_SHADER_LATE_ALLOC_GS_GFX10(late_alloc_limit_gs));
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}
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si_pm4_set_reg(pm4, R_00B01C_SPI_SHADER_PGM_RSRC3_PS,
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