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i965: Add brw_populate_default_key 

We will need to populate the default key for ARB_get_program_binary to
allow us to retrieve the default gen program to store in the program
binary.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
This commit is contained in:
Jordan Justen 2018-02-28 17:58:02 -08:00
parent 65f2014740
commit 36dd15f8b3
No known key found for this signature in database
GPG Key ID: 37F99F68CAF992EB
12 changed files with 208 additions and 86 deletions
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15
src/mesa/drivers/dri/i965/brw_cs.c
View File

@ -184,6 +184,16 @@ brw_upload_cs_prog(struct brw_context *brw)
assert(success);
}
void
brw_cs_populate_default_key(const struct gen_device_info *devinfo,
struct brw_cs_prog_key *key,
struct gl_program *prog)
{
memset(key, 0, sizeof(*key));
key->program_string_id = brw_program(prog)->id;
brw_setup_tex_for_precompile(devinfo, &key->tex, prog);
}
bool
brw_cs_precompile(struct gl_context *ctx, struct gl_program *prog)
@ -193,10 +203,7 @@ brw_cs_precompile(struct gl_context *ctx, struct gl_program *prog)
struct brw_program *bcp = brw_program(prog);
memset(&key, 0, sizeof(key));
key.program_string_id = bcp->id;
brw_setup_tex_for_precompile(&brw->screen->devinfo, &key.tex, prog);
brw_cs_populate_default_key(&brw->screen->devinfo, &key, prog);
uint32_t old_prog_offset = brw->cs.base.prog_offset;
struct brw_stage_prog_data *old_prog_data = brw->cs.base.prog_data;

4
src/mesa/drivers/dri/i965/brw_cs.h
View File

@ -34,6 +34,10 @@ brw_upload_cs_prog(struct brw_context *brw);
void
brw_cs_populate_key(struct brw_context *brw, struct brw_cs_prog_key *key);
void
brw_cs_populate_default_key(const struct gen_device_info *devinfo,
struct brw_cs_prog_key *key,
struct gl_program *prog);
#ifdef __cplusplus
}

16
src/mesa/drivers/dri/i965/brw_gs.c
View File

@ -208,6 +208,17 @@ brw_upload_gs_prog(struct brw_context *brw)
assert(success);
}
void
brw_gs_populate_default_key(const struct gen_device_info *devinfo,
struct brw_gs_prog_key *key,
struct gl_program *prog)
{
memset(key, 0, sizeof(*key));
brw_setup_tex_for_precompile(devinfo, &key->tex, prog);
key->program_string_id = brw_program(prog)->id;
}
bool
brw_gs_precompile(struct gl_context *ctx, struct gl_program *prog)
{
@ -219,10 +230,7 @@ brw_gs_precompile(struct gl_context *ctx, struct gl_program *prog)
struct brw_program *bgp = brw_program(prog);
memset(&key, 0, sizeof(key));
brw_setup_tex_for_precompile(&brw->screen->devinfo, &key.tex, prog);
key.program_string_id = bgp->id;
brw_gs_populate_default_key(&brw->screen->devinfo, &key, prog);
success = brw_codegen_gs_prog(brw, bgp, &key);

4
src/mesa/drivers/dri/i965/brw_gs.h
View File

@ -40,6 +40,10 @@ brw_upload_gs_prog(struct brw_context *brw);
void
brw_gs_populate_key(struct brw_context *brw,
struct brw_gs_prog_key *key);
void
brw_gs_populate_default_key(const struct gen_device_info *devinfo,
struct brw_gs_prog_key *key,
struct gl_program *prog);
#ifdef __cplusplus
} /* extern "C" */

35
src/mesa/drivers/dri/i965/brw_program.c
View File

@ -48,6 +48,11 @@
#include "brw_defines.h"
#include "intel_batchbuffer.h"
#include "brw_cs.h"
#include "brw_gs.h"
#include "brw_vs.h"
#include "brw_wm.h"
static bool
brw_nir_lower_uniforms(nir_shader *nir, bool is_scalar)
{
@ -853,3 +858,33 @@ brw_prog_key_set_id(union brw_any_prog_key *key, gl_shader_stage stage,
assert((int)stage >= 0 && stage < ARRAY_SIZE(stage_offsets));
*(unsigned*)((uint8_t*)key + stage_offsets[stage]) = id;
}
void
brw_populate_default_key(const struct gen_device_info *devinfo,
union brw_any_prog_key *prog_key,
struct gl_shader_program *sh_prog,
struct gl_program *prog)
{
switch (prog->info.stage) {
case MESA_SHADER_VERTEX:
brw_vs_populate_default_key(devinfo, &prog_key->vs, prog);
break;
case MESA_SHADER_TESS_CTRL:
brw_tcs_populate_default_key(devinfo, &prog_key->tcs, sh_prog, prog);
break;
case MESA_SHADER_TESS_EVAL:
brw_tes_populate_default_key(devinfo, &prog_key->tes, sh_prog, prog);
break;
case MESA_SHADER_GEOMETRY:
brw_gs_populate_default_key(devinfo, &prog_key->gs, prog);
break;
case MESA_SHADER_FRAGMENT:
brw_wm_populate_default_key(devinfo, &prog_key->wm, prog);
break;
case MESA_SHADER_COMPUTE:
brw_cs_populate_default_key(devinfo, &prog_key->cs, prog);
break;
default:
unreachable("Unsupported stage!");
}
}

15
src/mesa/drivers/dri/i965/brw_program.h
View File

@ -82,10 +82,17 @@ brw_assign_common_binding_table_offsets(const struct gen_device_info *devinfo,
const struct gl_program *prog,
struct brw_stage_prog_data *stage_prog_data,
uint32_t next_binding_table_offset);
void
brw_prog_key_set_id(union brw_any_prog_key *key, gl_shader_stage stage,
unsigned id);
void
brw_populate_default_key(const struct gen_device_info *devinfo,
union brw_any_prog_key *prog_key,
struct gl_shader_program *sh_prog,
struct gl_program *prog);
void
brw_stage_prog_data_free(const void *prog_data);
@ -108,9 +115,17 @@ GLboolean brw_link_shader(struct gl_context *ctx, struct gl_shader_program *prog
void brw_upload_tcs_prog(struct brw_context *brw);
void brw_tcs_populate_key(struct brw_context *brw,
struct brw_tcs_prog_key *key);
void brw_tcs_populate_default_key(const struct gen_device_info *devinfo,
struct brw_tcs_prog_key *key,
struct gl_shader_program *sh_prog,
struct gl_program *prog);
void brw_upload_tes_prog(struct brw_context *brw);
void brw_tes_populate_key(struct brw_context *brw,
struct brw_tes_prog_key *key);
void brw_tes_populate_default_key(const struct gen_device_info *devinfo,
struct brw_tes_prog_key *key,
struct gl_shader_program *sh_prog,
struct gl_program *prog);
void brw_write_blob_program_data(struct blob *binary, gl_shader_stage stage,
const void *program,

57
src/mesa/drivers/dri/i965/brw_tcs.c
View File

@ -354,6 +354,37 @@ brw_upload_tcs_prog(struct brw_context *brw)
assert(success);
}
void
brw_tcs_populate_default_key(const struct gen_device_info *devinfo,
struct brw_tcs_prog_key *key,
struct gl_shader_program *sh_prog,
struct gl_program *prog)
{
struct brw_program *btcp = brw_program(prog);
const struct gl_linked_shader *tes =
sh_prog->_LinkedShaders[MESA_SHADER_TESS_EVAL];
memset(key, 0, sizeof(*key));
key->program_string_id = btcp->id;
brw_setup_tex_for_precompile(devinfo, &key->tex, prog);
/* Guess that the input and output patches have the same dimensionality. */
if (devinfo->gen < 8)
key->input_vertices = prog->info.tess.tcs_vertices_out;
if (tes) {
key->tes_primitive_mode = tes->Program->info.tess.primitive_mode;
key->quads_workaround = devinfo->gen < 9 &&
tes->Program->info.tess.primitive_mode == GL_QUADS &&
tes->Program->info.tess.spacing == TESS_SPACING_EQUAL;
} else {
key->tes_primitive_mode = GL_TRIANGLES;
}
key->outputs_written = prog->nir->info.outputs_written;
key->patch_outputs_written = prog->nir->info.patch_outputs_written;
}
bool
brw_tcs_precompile(struct gl_context *ctx,
@ -369,31 +400,9 @@ brw_tcs_precompile(struct gl_context *ctx,
struct brw_program *btcp = brw_program(prog);
const struct gl_linked_shader *tes =
shader_prog->_LinkedShaders[MESA_SHADER_TESS_EVAL];
const struct gen_device_info *devinfo = &brw->screen->devinfo;
struct brw_program *btep = tes ? brw_program(tes->Program) : NULL;
memset(&key, 0, sizeof(key));
key.program_string_id = btcp->id;
brw_setup_tex_for_precompile(&brw->screen->devinfo, &key.tex, prog);
/* Guess that the input and output patches have the same dimensionality. */
if (devinfo->gen < 8)
key.input_vertices = prog->info.tess.tcs_vertices_out;
struct brw_program *btep;
if (tes) {
btep = brw_program(tes->Program);
key.tes_primitive_mode = tes->Program->info.tess.primitive_mode;
key.quads_workaround = devinfo->gen < 9 &&
tes->Program->info.tess.primitive_mode == GL_QUADS &&
tes->Program->info.tess.spacing == TESS_SPACING_EQUAL;
} else {
btep = NULL;
key.tes_primitive_mode = GL_TRIANGLES;
}
key.outputs_written = prog->nir->info.outputs_written;
key.patch_outputs_written = prog->nir->info.patch_outputs_written;
brw_tcs_populate_default_key(&brw->screen->devinfo, &key, shader_prog, prog);
success = brw_codegen_tcs_prog(brw, btcp, btep, &key);

40
src/mesa/drivers/dri/i965/brw_tes.c
View File

@ -211,6 +211,30 @@ brw_upload_tes_prog(struct brw_context *brw)
assert(success);
}
void
brw_tes_populate_default_key(const struct gen_device_info *devinfo,
struct brw_tes_prog_key *key,
struct gl_shader_program *sh_prog,
struct gl_program *prog)
{
struct brw_program *btep = brw_program(prog);
memset(key, 0, sizeof(*key));
key->program_string_id = btep->id;
key->inputs_read = prog->nir->info.inputs_read;
key->patch_inputs_read = prog->nir->info.patch_inputs_read;
if (sh_prog->_LinkedShaders[MESA_SHADER_TESS_CTRL]) {
struct gl_program *tcp =
sh_prog->_LinkedShaders[MESA_SHADER_TESS_CTRL]->Program;
key->inputs_read |= tcp->nir->info.outputs_written &
~(VARYING_BIT_TESS_LEVEL_INNER | VARYING_BIT_TESS_LEVEL_OUTER);
key->patch_inputs_read |= tcp->nir->info.patch_outputs_written;
}
brw_setup_tex_for_precompile(devinfo, &key->tex, prog);
}
bool
brw_tes_precompile(struct gl_context *ctx,
@ -225,21 +249,7 @@ brw_tes_precompile(struct gl_context *ctx,
struct brw_program *btep = brw_program(prog);
memset(&key, 0, sizeof(key));
key.program_string_id = btep->id;
key.inputs_read = prog->nir->info.inputs_read;
key.patch_inputs_read = prog->nir->info.patch_inputs_read;
if (shader_prog->_LinkedShaders[MESA_SHADER_TESS_CTRL]) {
struct gl_program *tcp =
shader_prog->_LinkedShaders[MESA_SHADER_TESS_CTRL]->Program;
key.inputs_read |= tcp->nir->info.outputs_written &
~(VARYING_BIT_TESS_LEVEL_INNER | VARYING_BIT_TESS_LEVEL_OUTER);
key.patch_inputs_read |= tcp->nir->info.patch_outputs_written;
}
brw_setup_tex_for_precompile(&brw->screen->devinfo, &key.tex, prog);
brw_tes_populate_default_key(&brw->screen->devinfo, &key, shader_prog, prog);
success = brw_codegen_tes_prog(brw, btep, &key);

26
src/mesa/drivers/dri/i965/brw_vs.c
View File

@ -356,6 +356,23 @@ brw_upload_vs_prog(struct brw_context *brw)
assert(success);
}
void
brw_vs_populate_default_key(const struct gen_device_info *devinfo,
struct brw_vs_prog_key *key,
struct gl_program *prog)
{
struct brw_program *bvp = brw_program(prog);
memset(key, 0, sizeof(*key));
brw_setup_tex_for_precompile(devinfo, &key->tex, prog);
key->program_string_id = bvp->id;
key->clamp_vertex_color =
(prog->info.outputs_written &
(VARYING_BIT_COL0 | VARYING_BIT_COL1 | VARYING_BIT_BFC0 |
VARYING_BIT_BFC1));
}
bool
brw_vs_precompile(struct gl_context *ctx, struct gl_program *prog)
{
@ -367,14 +384,7 @@ brw_vs_precompile(struct gl_context *ctx, struct gl_program *prog)
struct brw_program *bvp = brw_program(prog);
memset(&key, 0, sizeof(key));
brw_setup_tex_for_precompile(&brw->screen->devinfo, &key.tex, prog);
key.program_string_id = bvp->id;
key.clamp_vertex_color =
(prog->info.outputs_written &
(VARYING_BIT_COL0 | VARYING_BIT_COL1 | VARYING_BIT_BFC0 |
VARYING_BIT_BFC1));
brw_vs_populate_default_key(&brw->screen->devinfo, &key, prog);
success = brw_codegen_vs_prog(brw, bvp, &key);

4
src/mesa/drivers/dri/i965/brw_vs.h
View File

@ -45,6 +45,10 @@ brw_upload_vs_prog(struct brw_context *brw);
void
brw_vs_populate_key(struct brw_context *brw,
struct brw_vs_prog_key *key);
void
brw_vs_populate_default_key(const struct gen_device_info *devinfo,
struct brw_vs_prog_key *key,
struct gl_program *prog);
#ifdef __cplusplus
} /* extern "C" */

74
src/mesa/drivers/dri/i965/brw_wm.c
View File

@ -607,6 +607,45 @@ brw_upload_wm_prog(struct brw_context *brw)
assert(success);
}
void
brw_wm_populate_default_key(const struct gen_device_info *devinfo,
struct brw_wm_prog_key *key,
struct gl_program *prog)
{
memset(key, 0, sizeof(*key));
uint64_t outputs_written = prog->info.outputs_written;
if (devinfo->gen < 6) {
if (prog->info.fs.uses_discard)
key->iz_lookup |= BRW_WM_IZ_PS_KILL_ALPHATEST_BIT;
if (outputs_written & BITFIELD64_BIT(FRAG_RESULT_DEPTH))
key->iz_lookup |= BRW_WM_IZ_PS_COMPUTES_DEPTH_BIT;
/* Just assume depth testing. */
key->iz_lookup |= BRW_WM_IZ_DEPTH_TEST_ENABLE_BIT;
key->iz_lookup |= BRW_WM_IZ_DEPTH_WRITE_ENABLE_BIT;
}
if (devinfo->gen < 6 || _mesa_bitcount_64(prog->info.inputs_read &
BRW_FS_VARYING_INPUT_MASK) > 16) {
key->input_slots_valid = prog->info.inputs_read | VARYING_BIT_POS;
}
brw_setup_tex_for_precompile(devinfo, &key->tex, prog);
key->nr_color_regions = _mesa_bitcount_64(outputs_written &
~(BITFIELD64_BIT(FRAG_RESULT_DEPTH) |
BITFIELD64_BIT(FRAG_RESULT_STENCIL) |
BITFIELD64_BIT(FRAG_RESULT_SAMPLE_MASK)));
key->program_string_id = brw_program(prog)->id;
/* Whether reads from the framebuffer should behave coherently. */
key->coherent_fb_fetch = devinfo->gen >= 9;
}
bool
brw_fs_precompile(struct gl_context *ctx, struct gl_program *prog)
{
@ -616,38 +655,11 @@ brw_fs_precompile(struct gl_context *ctx, struct gl_program *prog)
struct brw_program *bfp = brw_program(prog);
memset(&key, 0, sizeof(key));
brw_wm_populate_default_key(&brw->screen->devinfo, &key, prog);
uint64_t outputs_written = prog->info.outputs_written;
if (devinfo->gen < 6) {
if (prog->info.fs.uses_discard)
key.iz_lookup |= BRW_WM_IZ_PS_KILL_ALPHATEST_BIT;
if (outputs_written & BITFIELD64_BIT(FRAG_RESULT_DEPTH))
key.iz_lookup |= BRW_WM_IZ_PS_COMPUTES_DEPTH_BIT;
/* Just assume depth testing. */
key.iz_lookup |= BRW_WM_IZ_DEPTH_TEST_ENABLE_BIT;
key.iz_lookup |= BRW_WM_IZ_DEPTH_WRITE_ENABLE_BIT;
}
if (devinfo->gen < 6 || _mesa_bitcount_64(prog->info.inputs_read &
BRW_FS_VARYING_INPUT_MASK) > 16) {
key.input_slots_valid = prog->info.inputs_read | VARYING_BIT_POS;
}
brw_setup_tex_for_precompile(&brw->screen->devinfo, &key.tex, prog);
key.nr_color_regions = _mesa_bitcount_64(outputs_written &
~(BITFIELD64_BIT(FRAG_RESULT_DEPTH) |
BITFIELD64_BIT(FRAG_RESULT_STENCIL) |
BITFIELD64_BIT(FRAG_RESULT_SAMPLE_MASK)));
key.program_string_id = bfp->id;
/* Whether reads from the framebuffer should behave coherently. */
key.coherent_fb_fetch = ctx->Extensions.EXT_shader_framebuffer_fetch;
/* check brw_wm_populate_default_key coherent_fb_fetch setting */
assert(key.coherent_fb_fetch ==
ctx->Extensions.EXT_shader_framebuffer_fetch);
uint32_t old_prog_offset = brw->wm.base.prog_offset;
struct brw_stage_prog_data *old_prog_data = brw->wm.base.prog_data;

4
src/mesa/drivers/dri/i965/brw_wm.h
View File

@ -47,6 +47,10 @@ brw_upload_wm_prog(struct brw_context *brw);
void
brw_wm_populate_key(struct brw_context *brw,
struct brw_wm_prog_key *key);
void
brw_wm_populate_default_key(const struct gen_device_info *devinfo,
struct brw_wm_prog_key *key,
struct gl_program *prog);
#ifdef __cplusplus
} // extern "C"