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i965: Replace brw_setup_tex_for_precompile brw with devinfo 

Trying to make sure the setup of the default program key is not
dependent on the GL state.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
This commit is contained in:
Jordan Justen 2018-02-28 17:14:50 -08:00
parent e426286e21
commit 65f2014740
No known key found for this signature in database
GPG Key ID: 37F99F68CAF992EB
8 changed files with 8 additions and 9 deletions
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2
src/mesa/drivers/dri/i965/brw_cs.c
View File

@ -196,7 +196,7 @@ brw_cs_precompile(struct gl_context *ctx, struct gl_program *prog)
memset(&key, 0, sizeof(key));
key.program_string_id = bcp->id;
brw_setup_tex_for_precompile(brw, &key.tex, prog);
brw_setup_tex_for_precompile(&brw->screen->devinfo, &key.tex, prog);
uint32_t old_prog_offset = brw->cs.base.prog_offset;
struct brw_stage_prog_data *old_prog_data = brw->cs.base.prog_data;

2
src/mesa/drivers/dri/i965/brw_gs.c
View File

@ -221,7 +221,7 @@ brw_gs_precompile(struct gl_context *ctx, struct gl_program *prog)
memset(&key, 0, sizeof(key));
brw_setup_tex_for_precompile(brw, &key.tex, prog);
brw_setup_tex_for_precompile(&brw->screen->devinfo, &key.tex, prog);
key.program_string_id = bgp->id;
success = brw_codegen_gs_prog(brw, bgp, &key);

3
src/mesa/drivers/dri/i965/brw_program.c
View File

@ -739,11 +739,10 @@ brw_dump_arb_asm(const char *stage, struct gl_program *prog)
}
void
brw_setup_tex_for_precompile(struct brw_context *brw,
brw_setup_tex_for_precompile(const struct gen_device_info *devinfo,
struct brw_sampler_prog_key_data *tex,
struct gl_program *prog)
{
const struct gen_device_info *devinfo = &brw->screen->devinfo;
const bool has_shader_channel_select = devinfo->is_haswell || devinfo->gen >= 8;
unsigned sampler_count = util_last_bit(prog->SamplersUsed);
for (unsigned i = 0; i < sampler_count; i++) {

2
src/mesa/drivers/dri/i965/brw_program.h
View File

@ -66,7 +66,7 @@ struct nir_shader *brw_create_nir(struct brw_context *brw,
void brw_shader_gather_info(nir_shader *nir, struct gl_program *prog);
void brw_setup_tex_for_precompile(struct brw_context *brw,
void brw_setup_tex_for_precompile(const struct gen_device_info *devinfo,
struct brw_sampler_prog_key_data *tex,
struct gl_program *prog);

2
src/mesa/drivers/dri/i965/brw_tcs.c
View File

@ -374,7 +374,7 @@ brw_tcs_precompile(struct gl_context *ctx,
memset(&key, 0, sizeof(key));
key.program_string_id = btcp->id;
brw_setup_tex_for_precompile(brw, &key.tex, prog);
brw_setup_tex_for_precompile(&brw->screen->devinfo, &key.tex, prog);
/* Guess that the input and output patches have the same dimensionality. */
if (devinfo->gen < 8)

2
src/mesa/drivers/dri/i965/brw_tes.c
View File

@ -239,7 +239,7 @@ brw_tes_precompile(struct gl_context *ctx,
key.patch_inputs_read |= tcp->nir->info.patch_outputs_written;
}
brw_setup_tex_for_precompile(brw, &key.tex, prog);
brw_setup_tex_for_precompile(&brw->screen->devinfo, &key.tex, prog);
success = brw_codegen_tes_prog(brw, btep, &key);

2
src/mesa/drivers/dri/i965/brw_vs.c
View File

@ -369,7 +369,7 @@ brw_vs_precompile(struct gl_context *ctx, struct gl_program *prog)
memset(&key, 0, sizeof(key));
brw_setup_tex_for_precompile(brw, &key.tex, prog);
brw_setup_tex_for_precompile(&brw->screen->devinfo, &key.tex, prog);
key.program_string_id = bvp->id;
key.clamp_vertex_color =
(prog->info.outputs_written &

2
src/mesa/drivers/dri/i965/brw_wm.c
View File

@ -637,7 +637,7 @@ brw_fs_precompile(struct gl_context *ctx, struct gl_program *prog)
key.input_slots_valid = prog->info.inputs_read | VARYING_BIT_POS;
}
brw_setup_tex_for_precompile(brw, &key.tex, prog);
brw_setup_tex_for_precompile(&brw->screen->devinfo, &key.tex, prog);
key.nr_color_regions = _mesa_bitcount_64(outputs_written &
~(BITFIELD64_BIT(FRAG_RESULT_DEPTH) |