i965: Move is_zero/one/null/accumulator into backend_reg.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
This commit is contained in:
Matt Turner 2014-06-29 15:35:58 -07:00
parent c019105f37
commit 34ef6a7651
6 changed files with 44 additions and 93 deletions

View File

@ -479,48 +479,12 @@ fs_reg::is_contiguous() const
return stride == 1; return stride == 1;
} }
bool
fs_reg::is_zero() const
{
if (file != IMM)
return false;
return fixed_hw_reg.dw1.d == 0;
}
bool
fs_reg::is_one() const
{
if (file != IMM)
return false;
return type == BRW_REGISTER_TYPE_F
? fixed_hw_reg.dw1.f == 1.0
: fixed_hw_reg.dw1.d == 1;
}
bool
fs_reg::is_null() const
{
return file == HW_REG &&
fixed_hw_reg.file == BRW_ARCHITECTURE_REGISTER_FILE &&
fixed_hw_reg.nr == BRW_ARF_NULL;
}
bool bool
fs_reg::is_valid_3src() const fs_reg::is_valid_3src() const
{ {
return file == GRF || file == UNIFORM; return file == GRF || file == UNIFORM;
} }
bool
fs_reg::is_accumulator() const
{
return file == HW_REG &&
fixed_hw_reg.file == BRW_ARCHITECTURE_REGISTER_FILE &&
fixed_hw_reg.nr == BRW_ARF_ACCUMULATOR;
}
int int
fs_visitor::type_size(const struct glsl_type *type) fs_visitor::type_size(const struct glsl_type *type)
{ {

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@ -79,12 +79,8 @@ public:
fs_reg(class fs_visitor *v, const struct glsl_type *type); fs_reg(class fs_visitor *v, const struct glsl_type *type);
bool equals(const fs_reg &r) const; bool equals(const fs_reg &r) const;
bool is_zero() const;
bool is_one() const;
bool is_null() const;
bool is_valid_3src() const; bool is_valid_3src() const;
bool is_contiguous() const; bool is_contiguous() const;
bool is_accumulator() const;
fs_reg &apply_stride(unsigned stride); fs_reg &apply_stride(unsigned stride);
/** Smear a channel of the reg to all channels. */ /** Smear a channel of the reg to all channels. */

View File

@ -553,6 +553,43 @@ backend_visitor::backend_visitor(struct brw_context *brw,
{ {
} }
bool
backend_reg::is_zero() const
{
if (file != IMM)
return false;
return fixed_hw_reg.dw1.d == 0;
}
bool
backend_reg::is_one() const
{
if (file != IMM)
return false;
return type == BRW_REGISTER_TYPE_F
? fixed_hw_reg.dw1.f == 1.0
: fixed_hw_reg.dw1.d == 1;
}
bool
backend_reg::is_null() const
{
return file == HW_REG &&
fixed_hw_reg.file == BRW_ARCHITECTURE_REGISTER_FILE &&
fixed_hw_reg.nr == BRW_ARF_NULL;
}
bool
backend_reg::is_accumulator() const
{
return file == HW_REG &&
fixed_hw_reg.file == BRW_ARCHITECTURE_REGISTER_FILE &&
fixed_hw_reg.nr == BRW_ARF_ACCUMULATOR;
}
bool bool
backend_instruction::is_tex() const backend_instruction::is_tex() const
{ {

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@ -42,6 +42,13 @@ enum PACKED register_file {
struct backend_reg struct backend_reg
{ {
#ifdef __cplusplus
bool is_zero() const;
bool is_one() const;
bool is_null() const;
bool is_accumulator() const;
#endif
enum register_file file; /**< Register file: GRF, MRF, IMM. */ enum register_file file; /**< Register file: GRF, MRF, IMM. */
uint8_t type; /**< Register type: BRW_REGISTER_TYPE_* */ uint8_t type; /**< Register type: BRW_REGISTER_TYPE_* */

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@ -151,15 +151,6 @@ src_reg::src_reg(dst_reg reg)
swizzles[2], swizzles[3]); swizzles[2], swizzles[3]);
} }
bool
src_reg::is_accumulator() const
{
return file == HW_REG &&
fixed_hw_reg.file == BRW_ARCHITECTURE_REGISTER_FILE &&
fixed_hw_reg.nr == BRW_ARF_ACCUMULATOR;
}
void void
dst_reg::init() dst_reg::init()
{ {
@ -221,22 +212,6 @@ dst_reg::dst_reg(src_reg reg)
this->fixed_hw_reg = reg.fixed_hw_reg; this->fixed_hw_reg = reg.fixed_hw_reg;
} }
bool
dst_reg::is_null() const
{
return file == HW_REG &&
fixed_hw_reg.file == BRW_ARCHITECTURE_REGISTER_FILE &&
fixed_hw_reg.nr == BRW_ARF_NULL;
}
bool
dst_reg::is_accumulator() const
{
return file == HW_REG &&
fixed_hw_reg.file == BRW_ARCHITECTURE_REGISTER_FILE &&
fixed_hw_reg.nr == BRW_ARF_ACCUMULATOR;
}
bool bool
vec4_instruction::is_send_from_grf() vec4_instruction::is_send_from_grf()
{ {
@ -601,28 +576,6 @@ vec4_visitor::pack_uniform_registers()
} }
} }
bool
src_reg::is_zero() const
{
if (file != IMM)
return false;
return fixed_hw_reg.dw1.d == 0;
}
bool
src_reg::is_one() const
{
if (file != IMM)
return false;
if (type == BRW_REGISTER_TYPE_F) {
return fixed_hw_reg.dw1.f == 1.0;
} else {
return fixed_hw_reg.dw1.d == 1;
}
}
/** /**
* Does algebraic optimizations (0 * a = 0, 1 * a = a, a + 0 = a). * Does algebraic optimizations (0 * a = 0, 1 * a = a, a + 0 = a).
* *

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@ -106,9 +106,6 @@ public:
src_reg(struct brw_reg reg); src_reg(struct brw_reg reg);
bool equals(const src_reg &r) const; bool equals(const src_reg &r) const;
bool is_zero() const;
bool is_one() const;
bool is_accumulator() const;
src_reg(class vec4_visitor *v, const struct glsl_type *type); src_reg(class vec4_visitor *v, const struct glsl_type *type);
@ -173,9 +170,6 @@ public:
explicit dst_reg(src_reg reg); explicit dst_reg(src_reg reg);
bool is_null() const;
bool is_accumulator() const;
int writemask; /**< Bitfield of WRITEMASK_[XYZW] */ int writemask; /**< Bitfield of WRITEMASK_[XYZW] */
src_reg *reladdr; src_reg *reladdr;