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i965/fs: Fix LOAD_PAYLOAD handling in register coalesce is_nop_mov(). 

is_nop_mov() was broken for LOAD_PAYLOAD instructions in two ways: On
the one hand the original destination register offset wasn't being
taken into account which would give incorrect results if it was
already non-zero, and on the other hand all source registers were
being treated as if they had a size of 32B, which is almost never the
case in SIMD16 programs for non-header sources.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
This commit is contained in:
Francisco Jerez 2016-09-01 21:36:59 -07:00
parent 5cc6425d70
commit 32d67923b2
1 changed files with 3 additions and 1 deletions
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4
src/mesa/drivers/dri/i965/brw_fs_register_coalesce.cpp
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@ -50,10 +50,12 @@ is_nop_mov(const fs_inst *inst)
if (inst->opcode == SHADER_OPCODE_LOAD_PAYLOAD) {
fs_reg dst = inst->dst;
for (int i = 0; i < inst->sources; i++) {
dst.offset = i * REG_SIZE + dst.offset % REG_SIZE;
if (!dst.equals(inst->src[i])) {
return false;
}
dst.offset += (i < inst->header_size ? REG_SIZE :
inst->exec_size * dst.stride *
type_sz(inst->src[i].type));
}
return true;
} else if (inst->opcode == BRW_OPCODE_MOV) {