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r600g: set full register mask for CB_COLOR_CONTROL on evergreen 

We don't set the other bits anywhere else.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Marek Olšák 2012-01-29 03:17:18 +01:00
parent e3032a0523
commit 2ffa8af9db
1 changed files with 1 additions and 1 deletions
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2
src/gallium/drivers/r600/evergreen_state.c
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@ -750,7 +750,7 @@ static void *evergreen_create_blend_state(struct pipe_context *ctx,
blend->cb_target_mask = target_mask;
r600_pipe_state_add_reg(rstate, R_028808_CB_COLOR_CONTROL,
color_control, 0xFFFFFFFD, NULL, 0);
color_control, 0xFFFFFFFF, NULL, 0);
if (rctx->chip_class != CAYMAN)
r600_pipe_state_add_reg(rstate, R_028C3C_PA_SC_AA_MASK, 0xFFFFFFFF, 0xFFFFFFFF, NULL, 0);