r600g: Properly update DB_SHADER_CONTROL in evergreen_pipe_shader_ps().
Disable Z_EXPORT / STENCIL_EXPORT / KILL_ENABLE again if a shader doesn't
use those. This is similar to 0a6f09a76a
.
Signed-off-by: Henri Verbeet <hverbeet@gmail.com>
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a2ef38368b
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2342e89979
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@ -1329,7 +1329,7 @@ void evergreen_pipe_shader_ps(struct pipe_context *ctx, struct r600_pipe_shader
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{
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struct r600_pipe_state *rstate = &shader->rstate;
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struct r600_shader *rshader = &shader->shader;
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unsigned i, exports_ps, num_cout, spi_ps_in_control_0, spi_input_z, spi_ps_in_control_1;
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unsigned i, exports_ps, num_cout, spi_ps_in_control_0, spi_input_z, spi_ps_in_control_1, db_shader_control;
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int pos_index = -1, face_index = -1;
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int ninterp = 0;
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boolean have_linear = FALSE, have_centroid = FALSE, have_perspective = FALSE;
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@ -1337,6 +1337,7 @@ void evergreen_pipe_shader_ps(struct pipe_context *ctx, struct r600_pipe_shader
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rstate->nregs = 0;
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db_shader_control = 0;
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for (i = 0; i < rshader->ninput; i++) {
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/* evergreen NUM_INTERP only contains values interpolated into the LDS,
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POSITION goes via GPRs from the SC so isn't counted */
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@ -1358,16 +1359,12 @@ void evergreen_pipe_shader_ps(struct pipe_context *ctx, struct r600_pipe_shader
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}
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for (i = 0; i < rshader->noutput; i++) {
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if (rshader->output[i].name == TGSI_SEMANTIC_POSITION)
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r600_pipe_state_add_reg(rstate,
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R_02880C_DB_SHADER_CONTROL,
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S_02880C_Z_EXPORT_ENABLE(1),
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S_02880C_Z_EXPORT_ENABLE(1), NULL);
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db_shader_control |= S_02880C_Z_EXPORT_ENABLE(1);
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if (rshader->output[i].name == TGSI_SEMANTIC_STENCIL)
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r600_pipe_state_add_reg(rstate,
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R_02880C_DB_SHADER_CONTROL,
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S_02880C_STENCIL_EXPORT_ENABLE(1),
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S_02880C_STENCIL_EXPORT_ENABLE(1), NULL);
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db_shader_control |= S_02880C_STENCIL_EXPORT_ENABLE(1);
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}
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if (rshader->uses_kill)
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db_shader_control |= S_02880C_KILL_ENABLE(1);
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exports_ps = 0;
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num_cout = 0;
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@ -1442,15 +1439,14 @@ void evergreen_pipe_shader_ps(struct pipe_context *ctx, struct r600_pipe_shader
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r600_pipe_state_add_reg(rstate,
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R_02884C_SQ_PGM_EXPORTS_PS,
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exports_ps, 0xFFFFFFFF, NULL);
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if (rshader->uses_kill) {
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/* only set some bits here, the other bits are set in the dsa state */
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r600_pipe_state_add_reg(rstate,
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R_02880C_DB_SHADER_CONTROL,
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S_02880C_KILL_ENABLE(1),
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S_02880C_KILL_ENABLE(1), NULL);
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}
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/* only set some bits here, the other bits are set in the dsa state */
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r600_pipe_state_add_reg(rstate,
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R_02880C_DB_SHADER_CONTROL,
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db_shader_control,
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S_02880C_Z_EXPORT_ENABLE(1) |
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S_02880C_STENCIL_EXPORT_ENABLE(1) |
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S_02880C_KILL_ENABLE(1),
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NULL);
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r600_pipe_state_add_reg(rstate,
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R_03A200_SQ_LOOP_CONST_0, 0x01000FFF,
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0xFFFFFFFF, NULL);
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